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Searched refs:portSET_INTERRUPT_MASK_FROM_ISR (Results 1 – 20 of 20) sorted by relevance

/hal_espressif-3.5.0/components/freertos/include/freertos/
Datomic.h60 #if defined( portSET_INTERRUPT_MASK_FROM_ISR )
64 UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
DFreeRTOS.h303 #ifndef portSET_INTERRUPT_MASK_FROM_ISR
304 #define portSET_INTERRUPT_MASK_FROM_ISR() 0 macro
975 #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR()
Dtask.h226 #define taskENTER_CRITICAL_FROM_ISR( ) portSET_INTERRUPT_MASK_FROM_ISR()
/hal_espressif-3.5.0/components/freertos/port/riscv/include/freertos/
Dportmacro.h344 #define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK_FROM_ISR()
346 #define portSET_INTERRUPT_MASK_FROM_ISR() vPortSetInterruptMask() macro
Dportmacro_deprecated.h21 return portSET_INTERRUPT_MASK_FROM_ISR(); in portENTER_CRITICAL_NESTED()
/hal_espressif-3.5.0/components/freertos/test/
Dtest_tasks_snapshot.c25 unsigned state = portSET_INTERRUPT_MASK_FROM_ISR();
/hal_espressif-3.5.0/components/freertos/port/xtensa/include/freertos/
Dportmacro_deprecated.h21 return portSET_INTERRUPT_MASK_FROM_ISR(); in portENTER_CRITICAL_NESTED()
Dportmacro.h455 #define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMaskFromISR() macro
/hal_espressif-3.5.0/components/freertos/port/xtensa/
Dport.c259 irqStatus = portSET_INTERRUPT_MASK_FROM_ISR(); in xPortInIsrContext()
287 BaseType_t xOldInterruptLevel = portSET_INTERRUPT_MASK_FROM_ISR(); in xPortEnterCriticalTimeout()
/hal_espressif-3.5.0/components/freertos/
Dstream_buffer.c104 uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); \
157 uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); \
1148 uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); in xStreamBufferSendCompletedFromISR()
1179 uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); in xStreamBufferReceiveCompletedFromISR()
Dqueue.c1080 uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); in xQueueGenericSendFromISR()
1244 uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); in xQueueGiveFromISR()
1964 uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); in xQueueReceiveFromISR()
2061 uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); in xQueuePeekFromISR()
Devent_groups.c574 uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); in xEventGroupGetBitsFromISR()
Dtasks.c2435 state = portSET_INTERRUPT_MASK_FROM_ISR(); in vTaskSuspendAll()
4640 state = portSET_INTERRUPT_MASK_FROM_ISR(); in xTaskGetCurrentTaskHandle()
4669 state = portSET_INTERRUPT_MASK_FROM_ISR(); in xTaskGetSchedulerState()
DHistory.txt949 + The Cortex-M0 version of portSET_INTERRUPT_MASK_FROM_ISR and
/hal_espressif-3.5.0/components/esp_ipc/src/esp_ipc_isr/
Desp_ipc_isr.c112 BaseType_t intLvl = portSET_INTERRUPT_MASK_FROM_ISR(); in esp_ipc_isr_stall_other_cpu()
/hal_espressif-3.5.0/components/freertos/port/riscv/
Dport.c268 BaseType_t state = portSET_INTERRUPT_MASK_FROM_ISR(); in vPortEnterCritical()
/hal_espressif-3.5.0/components/app_trace/
Dapp_trace_util.c65 unsigned int_state = portSET_INTERRUPT_MASK_FROM_ISR(); in esp_apptrace_lock_take()
/hal_espressif-3.5.0/components/esp_pm/
Dpm_impl.c788 uint32_t state = portSET_INTERRUPT_MASK_FROM_ISR();
808 uint32_t state = portSET_INTERRUPT_MASK_FROM_ISR();
/hal_espressif-3.5.0/components/esp_system/test/
Dtest_reset_reason.c184 BaseType_t prev_level = portSET_INTERRUPT_MASK_FROM_ISR(); in do_int_wdt()
/hal_espressif-3.5.0/components/newlib/
Dstdatomic.c42 unsigned state = portSET_INTERRUPT_MASK_FROM_ISR(); \