Searched refs:clkcnt_n (Results 1 – 15 of 15) sorted by relevance
571 reg.clkcnt_n = 0; in spi_ll_master_cal_clock()613 reg.clkcnt_n = n - 1; in spi_ll_master_cal_clock()
646 reg.clkcnt_n = 0; in spi_ll_master_cal_clock()688 reg.clkcnt_n = n - 1; in spi_ll_master_cal_clock()
649 reg.clkcnt_n = 0; in spi_ll_master_cal_clock()691 reg.clkcnt_n = n - 1; in spi_ll_master_cal_clock()
656 reg.clkcnt_n = 0; in spi_ll_master_cal_clock()698 reg.clkcnt_n = n - 1; in spi_ll_master_cal_clock()
64 …uint32_t clkcnt_n : 6; /*In the master mode it is the divider of spi_clk.… member
95 …uint32_t clkcnt_n: 8; /*In the master mode it is the divider of spi_mem_clk.… member
613 reg.clkcnt_n = 0; in spi_ll_master_cal_clock()655 reg.clkcnt_n = n - 1; in spi_ll_master_cal_clock()
65 …uint32_t clkcnt_n : 6; /*In the master mode it is the divider of spi_clk.… member
66 …uint32_t clkcnt_n : 6; /*In the master mode it is the divider of spi_clk.… member
101 …uint32_t clkcnt_n : 8; /*When SPI0 accesses flash, f_SPI_CLK = f_MSPI_COR… member
96 …uint32_t clkcnt_n: 8; /*In the master mode it is the divider of spi_… member
85 …uint32_t clkcnt_n: 6; /*In the master mode it is the divider of spi_clk. S… member
103 …uint32_t clkcnt_n: 6; /*In the master mode it is the divider of spi_clk.… member
66 …ct pre %d n %d, got pre %d n %d\n", clk, pre, n, hw->clock.clkdiv_pre + 1, hw->clock.clkcnt_n + 1); in check_spi_pre_n_for()68 TEST_ASSERT(hw->clock.clkcnt_n + 1 == n); in check_spi_pre_n_for()
