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Searched refs:aligned (Results 1 – 25 of 50) sorted by relevance

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/hal_espressif-3.5.0/components/heap/
Dheap_tlsf.c113 const tlsfptr_t aligned = in align_ptr() local
116 return tlsf_cast(void*, aligned); in align_ptr()
128 const size_t aligned = align_up(size, align); in adjust_request_size() local
131 if (aligned < block_size_max) in adjust_request_size()
133 adjust = tlsf_max(aligned, block_size_min); in adjust_request_size()
822 void* aligned = align_ptr(ptr, align); in tlsf_memalign_offs() local
824 tlsf_cast(tlsfptr_t, aligned) - tlsf_cast(tlsfptr_t, ptr)); in tlsf_memalign_offs()
837 tlsf_cast(tlsfptr_t, aligned) + offset); in tlsf_memalign_offs()
839 aligned = align_ptr(next_aligned, align); in tlsf_memalign_offs()
841 tlsf_cast(tlsfptr_t, aligned) - tlsf_cast(tlsfptr_t, ptr)); in tlsf_memalign_offs()
/hal_espressif-3.5.0/tools/test_apps/build_system/ldalign_test/main/
Dtest_main.c3 const static uint32_t __attribute__ ((aligned (64))) testTab[] =
/hal_espressif-3.5.0/components/bt/host/bluedroid/bta/sdp/
Dbta_sdp_cfg.c34 static UINT8 __attribute__ ((aligned(4))) bta_sdp_db_data[BTA_SDP_DB_SIZE];
/hal_espressif-3.5.0/components/bt/host/bluedroid/bta/jv/
Dbta_jv_cfg.c48 static UINT8 __attribute__ ((aligned(4))) bta_jv_sdp_db_data[BTA_JV_SDP_DB_SIZE];
/hal_espressif-3.5.0/components/wear_levelling/private_include/
DWL_Config.h28 #define ALIGNED_(x) __attribute__ ((aligned(x)))
DWL_State.h26 #define ALIGNED_(x) __attribute__ ((aligned(x)))
/hal_espressif-3.5.0/tools/test_apps/build_system/ldalign_test/
DREADME.txt2 `.flash.rodata` sections. Indeed, `.flash.appdesc` shall ALWAYS be aligned on
/hal_espressif-3.5.0/components/spiffs/test_spiffsgen/
Dtest_spiffsgen.py34 aligned=True,
/hal_espressif-3.5.0/components/spi_flash/esp32/
Dflash_ops_esp32.c51 uint8_t encrypt_buf[32] __attribute__((aligned(4))); in spi_flash_write_encrypted_chip()
/hal_espressif-3.5.0/components/esp_system/ld/esp32h2/
Dsections.ld.in134 ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
351 /* Keep this section shall be at least aligned on 4 */
363 * shall be aligned on 8. */
/hal_espressif-3.5.0/components/esp_system/ld/esp32c3/
Dsections.ld.in126 ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
343 /* Keep this section shall be at least aligned on 4 */
355 * shall be aligned on 8. */
/hal_espressif-3.5.0/components/spiffs/
Dspiffsgen.py62 aligned, # type: bool argument
76 self.aligned = aligned
/hal_espressif-3.5.0/components/sdmmc/test/
Dtest_sd.c344 int aligned = ((alignment % 4) == 0)? 1: 0; in do_single_write_read_test() local
346 (int)(total_size * 1000 / time_wr), block_count, aligned); in do_single_write_read_test()
348 (int)(total_size * 1000 / time_rd), block_count, aligned); in do_single_write_read_test()
/hal_espressif-3.5.0/components/freertos/port/riscv/
Dport.c117 __attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE];
/hal_espressif-3.5.0/components/xtensa/include/xtensa/
Dxtruntime-frames.h43 #define STRUCT_AFIELD_A(ctype,size,align,pre,name,n) ctype name[n] __attribute__((aligned(align)));
/hal_espressif-3.5.0/components/esp_common/include/
Desp_attr.h52 #define WORD_ALIGNED_ATTR __attribute__((aligned(4)))
/hal_espressif-3.5.0/components/esptool_py/esptool/docs/en/espefuse/
Dburn-block-data-cmd.rst45 …e eFuse read registers (but these reads must be always be complete register words, 4-byte aligned).
/hal_espressif-3.5.0/docs/en/api-reference/system/
Dfreertos_additions.rst37 … store items at 32-bit aligned addresses. Therefore, when retrieving an item, the item pointer is …
40 …l 8 bytes for a header**. Item sizes will also be rounded up to a 32-bit aligned size (multiple of…
200 …e, the space occupied by each item is **rounded up to the nearest 32-bit aligned size** in order t…
330 …e area of size ``xBufferSize``. Note that ``xBufferSize`` must be 32-bit aligned for No-Split and …
346 #define BUFFER_SIZE 400 //32-bit aligned size
/hal_espressif-3.5.0/components/bootloader_support/src/esp32h2/
Dsecure_boot.c69 uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0}; in s_calculate_image_public_key_digests()
/hal_espressif-3.5.0/docs/zh_CN/api-guides/
Dunit-tests-legacy.rst209 (19) "SPI Master DMA test: length, start, not aligned" [spi]
Dunit-tests.rst211 (19) "SPI Master DMA test: length, start, not aligned" [spi]
/hal_espressif-3.5.0/components/bootloader_support/src/secure_boot_v2/
Dsecure_boot.c68 uint8_t __attribute__((aligned(4))) key_digest[ESP_SECURE_BOOT_DIGEST_LEN] = {0}; in s_calculate_image_public_key_digests()
/hal_espressif-3.5.0/docs/en/api-guides/
Dfatal-errors.rst331 …bit read can only be done from a 4-byte aligned address, and a 16-bit write can only be done to a …
356 … This CPU exception indicates that the address of the instruction to execute is not 2-byte aligned.
371 …32-bit load can only be done from 4-byte aligned address, and 16-bit load can only be done from a …
Dmemory-types.rst8 …ruction memory is executable, and can only be read or written via 4-byte aligned words. Data memor…
166 and word-aligned. We suggest to place DMA buffers in static variables rather than in the stack. Use…
/hal_espressif-3.5.0/docs/en/api-reference/peripherals/
Dspi_slave.rst196aligned (starting from a 32-bit boundary and having a length of multiples of 4 bytes). Otherwise, …

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