1 /*
2  * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #pragma once
8 
9 /**
10  * @file regi2c_apll.h
11  * @brief Register definitions for digital PLL (BBPLL)
12  *
13  * This file lists register fields of BBPLL, located on an internal configuration
14  * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
15  * rtc_clk_cpu_freq_set function in rtc_clk.c.
16  */
17 
18 #define I2C_BBPLL           0x66
19 #define I2C_BBPLL_HOSTID    4
20 
21 #define I2C_BBPLL_IR_CAL_DELAY        0
22 #define I2C_BBPLL_IR_CAL_DELAY_MSB    3
23 #define I2C_BBPLL_IR_CAL_DELAY_LSB    0
24 
25 #define I2C_BBPLL_IR_CAL_CK_DIV        0
26 #define I2C_BBPLL_IR_CAL_CK_DIV_MSB    7
27 #define I2C_BBPLL_IR_CAL_CK_DIV_LSB    4
28 
29 #define I2C_BBPLL_IR_CAL_EXT_CAP        1
30 #define I2C_BBPLL_IR_CAL_EXT_CAP_MSB    3
31 #define I2C_BBPLL_IR_CAL_EXT_CAP_LSB    0
32 
33 #define I2C_BBPLL_IR_CAL_ENX_CAP        1
34 #define I2C_BBPLL_IR_CAL_ENX_CAP_MSB    4
35 #define I2C_BBPLL_IR_CAL_ENX_CAP_LSB    4
36 
37 #define I2C_BBPLL_IR_CAL_RSTB        1
38 #define I2C_BBPLL_IR_CAL_RSTB_MSB    5
39 #define I2C_BBPLL_IR_CAL_RSTB_LSB    5
40 
41 #define I2C_BBPLL_IR_CAL_START        1
42 #define I2C_BBPLL_IR_CAL_START_MSB    6
43 #define I2C_BBPLL_IR_CAL_START_LSB    6
44 
45 #define I2C_BBPLL_IR_CAL_UNSTOP        1
46 #define I2C_BBPLL_IR_CAL_UNSTOP_MSB    7
47 #define I2C_BBPLL_IR_CAL_UNSTOP_LSB    7
48 
49 #define I2C_BBPLL_OC_REF_DIV        2
50 #define I2C_BBPLL_OC_REF_DIV_MSB    3
51 #define I2C_BBPLL_OC_REF_DIV_LSB    0
52 
53 #define I2C_BBPLL_OC_DIV_10_8        2
54 #define I2C_BBPLL_OC_DIV_10_8_MSB    6
55 #define I2C_BBPLL_OC_DIV_10_8_LSB    4
56 
57 #define I2C_BBPLL_OC_LREF        2
58 #define I2C_BBPLL_OC_LREF_MSB    7
59 #define I2C_BBPLL_OC_LREF_LSB    7
60 
61 #define I2C_BBPLL_OC_DIV_7_0        3
62 #define I2C_BBPLL_OC_DIV_7_0_MSB    7
63 #define I2C_BBPLL_OC_DIV_7_0_LSB    0
64 
65 #define I2C_BBPLL_OC_ENB_FCAL        4
66 #define I2C_BBPLL_OC_ENB_FCAL_MSB    0
67 #define I2C_BBPLL_OC_ENB_FCAL_LSB    0
68 
69 #define I2C_BBPLL_OC_DCHGP        4
70 #define I2C_BBPLL_OC_DCHGP_MSB    3
71 #define I2C_BBPLL_OC_DCHGP_LSB    1
72 
73 #define I2C_BBPLL_OC_DHREF_SEL        4
74 #define I2C_BBPLL_OC_DHREF_SEL_MSB    5
75 #define I2C_BBPLL_OC_DHREF_SEL_LSB    4
76 
77 #define I2C_BBPLL_OC_DLREF_SEL        4
78 #define I2C_BBPLL_OC_DLREF_SEL_MSB    7
79 #define I2C_BBPLL_OC_DLREF_SEL_LSB    6
80 
81 #define I2C_BBPLL_OC_DCUR        5
82 #define I2C_BBPLL_OC_DCUR_MSB    2
83 #define I2C_BBPLL_OC_DCUR_LSB    0
84 
85 #define I2C_BBPLL_OC_BST_DIV        5
86 #define I2C_BBPLL_OC_BST_DIV_MSB    3
87 #define I2C_BBPLL_OC_BST_DIV_LSB    3
88 
89 #define I2C_BBPLL_OC_BST_E2C        5
90 #define I2C_BBPLL_OC_BST_E2C_MSB    4
91 #define I2C_BBPLL_OC_BST_E2C_LSB    4
92 
93 #define I2C_BBPLL_OC_TSCHGP        5
94 #define I2C_BBPLL_OC_TSCHGP_MSB    5
95 #define I2C_BBPLL_OC_TSCHGP_LSB    5
96 
97 #define I2C_BBPLL_OC_BW        5
98 #define I2C_BBPLL_OC_BW_MSB    7
99 #define I2C_BBPLL_OC_BW_LSB    6
100 
101 #define I2C_BBPLL_OR_LOCK1        6
102 #define I2C_BBPLL_OR_LOCK1_MSB    0
103 #define I2C_BBPLL_OR_LOCK1_LSB    0
104 
105 #define I2C_BBPLL_OR_LOCK2        6
106 #define I2C_BBPLL_OR_LOCK2_MSB    1
107 #define I2C_BBPLL_OR_LOCK2_LSB    1
108 
109 #define I2C_BBPLL_OR_CAL_CAP        7
110 #define I2C_BBPLL_OR_CAL_CAP_MSB    3
111 #define I2C_BBPLL_OR_CAL_CAP_LSB    0
112 
113 #define I2C_BBPLL_OR_CAL_UDF        7
114 #define I2C_BBPLL_OR_CAL_UDF_MSB    4
115 #define I2C_BBPLL_OR_CAL_UDF_LSB    4
116 
117 #define I2C_BBPLL_OR_CAL_OVF        7
118 #define I2C_BBPLL_OR_CAL_OVF_MSB    5
119 #define I2C_BBPLL_OR_CAL_OVF_LSB    5
120 
121 #define I2C_BBPLL_OR_CAL_END        7
122 #define I2C_BBPLL_OR_CAL_END_MSB    6
123 #define I2C_BBPLL_OR_CAL_END_LSB    6
124 
125 #define I2C_BBPLL_BBADC_DELAY1        8
126 #define I2C_BBPLL_BBADC_DELAY1_MSB    1
127 #define I2C_BBPLL_BBADC_DELAY1_LSB    0
128 
129 #define I2C_BBPLL_BBADC_DELAY2        8
130 #define I2C_BBPLL_BBADC_DELAY2_MSB    3
131 #define I2C_BBPLL_BBADC_DELAY2_LSB    2
132 
133 #define I2C_BBPLL_BBADC_DELAY3        8
134 #define I2C_BBPLL_BBADC_DELAY3_MSB    5
135 #define I2C_BBPLL_BBADC_DELAY3_LSB    4
136 
137 #define I2C_BBPLL_BBADC_DELAY4        8
138 #define I2C_BBPLL_BBADC_DELAY4_MSB    7
139 #define I2C_BBPLL_BBADC_DELAY4_LSB    6
140 
141 #define I2C_BBPLL_BBADC_DELAY5        9
142 #define I2C_BBPLL_BBADC_DELAY5_MSB    1
143 #define I2C_BBPLL_BBADC_DELAY5_LSB    0
144 
145 #define I2C_BBPLL_BBADC_DELAY6        9
146 #define I2C_BBPLL_BBADC_DELAY6_MSB    3
147 #define I2C_BBPLL_BBADC_DELAY6_LSB    2
148 
149 #define I2C_BBPLL_BBADC_DSMP        9
150 #define I2C_BBPLL_BBADC_DSMP_MSB    7
151 #define I2C_BBPLL_BBADC_DSMP_LSB    4
152 
153 #define I2C_BBPLL_DTEST        10
154 #define I2C_BBPLL_DTEST_MSB    1
155 #define I2C_BBPLL_DTEST_LSB    0
156 
157 #define I2C_BBPLL_ENT_ADC        10
158 #define I2C_BBPLL_ENT_ADC_MSB    3
159 #define I2C_BBPLL_ENT_ADC_LSB    2
160 
161 #define I2C_BBPLL_BBADC_DIV        10
162 #define I2C_BBPLL_BBADC_DIV_MSB    5
163 #define I2C_BBPLL_BBADC_DIV_LSB    4
164 
165 #define I2C_BBPLL_ENT_PLL        10
166 #define I2C_BBPLL_ENT_PLL_MSB    6
167 #define I2C_BBPLL_ENT_PLL_LSB    6
168 
169 #define I2C_BBPLL_OC_ENB_VCON        10
170 #define I2C_BBPLL_OC_ENB_VCON_MSB    7
171 #define I2C_BBPLL_OC_ENB_VCON_LSB    7
172 
173 #define I2C_BBPLL_DIV_DAC        11
174 #define I2C_BBPLL_DIV_DAC_MSB    0
175 #define I2C_BBPLL_DIV_DAC_LSB    0
176 
177 #define I2C_BBPLL_DIV_CPU        11
178 #define I2C_BBPLL_DIV_CPU_MSB    1
179 #define I2C_BBPLL_DIV_CPU_LSB    1
180 
181 #define I2C_BBPLL_BBADC_INPUT_SHORT        11
182 #define I2C_BBPLL_BBADC_INPUT_SHORT_MSB    2
183 #define I2C_BBPLL_BBADC_INPUT_SHORT_LSB    2
184 
185 #define I2C_BBPLL_BBADC_CAL_9_8        11
186 #define I2C_BBPLL_BBADC_CAL_9_8_MSB    4
187 #define I2C_BBPLL_BBADC_CAL_9_8_LSB    3
188 
189 #define I2C_BBPLL_BBADC_DCM        11
190 #define I2C_BBPLL_BBADC_DCM_MSB    6
191 #define I2C_BBPLL_BBADC_DCM_LSB    5
192 
193 #define I2C_BBPLL_ENDIV5        11
194 #define I2C_BBPLL_ENDIV5_MSB    7
195 #define I2C_BBPLL_ENDIV5_LSB    7
196 
197 #define I2C_BBPLL_BBADC_CAL_7_0        12
198 #define I2C_BBPLL_BBADC_CAL_7_0_MSB    7
199 #define I2C_BBPLL_BBADC_CAL_7_0_LSB    0
200