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Searched refs:ETS_CACHEERR_INUM (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-3.5.0/components/esp_system/port/soc/esp32c3/
Dcache_err_int.c33 ESP_INTR_DISABLE(ETS_CACHEERR_INUM); in esp_cache_err_int_init()
57 intr_matrix_set(core_id, ETS_CACHE_IA_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
58 intr_matrix_set(core_id, ETS_CACHE_CORE0_ACS_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
61 esprv_intc_int_set_type(BIT(ETS_CACHEERR_INUM), INTR_TYPE_LEVEL); in esp_cache_err_int_init()
62 esprv_intc_int_set_priority(ETS_CACHEERR_INUM, SOC_INTERRUPT_LEVEL_MEDIUM); in esp_cache_err_int_init()
96 ESP_INTR_ENABLE(ETS_CACHEERR_INUM); in esp_cache_err_int_init()
/hal_espressif-3.5.0/components/esp_system/port/soc/esp32h2/
Dcache_err_int.c33 ESP_INTR_DISABLE(ETS_CACHEERR_INUM); in esp_cache_err_int_init()
57 intr_matrix_set(core_id, ETS_CACHE_IA_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
58 intr_matrix_set(core_id, ETS_CACHE_CORE0_ACS_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
61 esprv_intc_int_set_type(BIT(ETS_CACHEERR_INUM), INTR_TYPE_LEVEL); in esp_cache_err_int_init()
62 esprv_intc_int_set_priority(ETS_CACHEERR_INUM, SOC_INTERRUPT_LEVEL_MEDIUM); in esp_cache_err_int_init()
96 ESP_INTR_ENABLE(ETS_CACHEERR_INUM); in esp_cache_err_int_init()
/hal_espressif-3.5.0/components/esp_system/port/soc/esp32s3/
Dcache_err_int.c30 ESP_INTR_DISABLE(ETS_CACHEERR_INUM); in esp_cache_err_int_init()
35 intr_matrix_set(core_id, ETS_CACHE_IA_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
61 intr_matrix_set(core_id, ETS_CACHE_CORE0_ACS_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
79 intr_matrix_set(core_id, ETS_CACHE_CORE1_ACS_INTR_SOURCE, ETS_CACHEERR_INUM); in esp_cache_err_int_init()
99 ESP_INTR_ENABLE(ETS_CACHEERR_INUM); in esp_cache_err_int_init()
Dhighint_hdl.S80 extui a0, a0, ETS_CACHEERR_INUM, 1 /* get cacheerr int bit */
84 movi a4, ~(1<<ETS_CACHEERR_INUM)
/hal_espressif-3.5.0/components/soc/esp32/include/soc/
Dsoc.h403 #define ETS_CACHEERR_INUM ETS_MEMACCESS_ERR_INUM macro
455 #define ETS_CACHEERR_INUM ETS_MEMACCESS_ERR_INUM macro
/hal_espressif-3.5.0/components/soc/esp32c3/include/soc/
Dsoc.h281 #define ETS_CACHEERR_INUM 25 macro
/hal_espressif-3.5.0/components/soc/esp32h2/include/soc/
Dsoc.h304 #define ETS_CACHEERR_INUM 25 macro
/hal_espressif-3.5.0/components/soc/esp32s3/include/soc/
Dsoc.h348 #define ETS_CACHEERR_INUM 25 macro
/hal_espressif-3.5.0/components/esp_system/port/arch/riscv/
Dpanic_arch.c273 if (frame->mcause == ETS_CACHEERR_INUM) { in panic_soc_fill_info()
/hal_espressif-3.5.0/components/riscv/
Dvectors.S133 .rept (ETS_MAX_INUM - ETS_CACHEERR_INUM)