DR_REG_GPIO_SD_BASE (reference) in projects: hal_espressif-3.5.0

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Searched refs:DR_REG_GPIO_SD_BASE (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-3.5.0/components/soc/esp32/include/soc/
D	gpio_sd_reg.h	18 #define GPIO_SIGMADELTA0_REG (DR_REG_GPIO_SD_BASE + 0x0000) 32 #define GPIO_SIGMADELTA1_REG (DR_REG_GPIO_SD_BASE + 0x0004) 46 #define GPIO_SIGMADELTA2_REG (DR_REG_GPIO_SD_BASE + 0x0008) 60 #define GPIO_SIGMADELTA3_REG (DR_REG_GPIO_SD_BASE + 0x000c) 74 #define GPIO_SIGMADELTA4_REG (DR_REG_GPIO_SD_BASE + 0x0010) 88 #define GPIO_SIGMADELTA5_REG (DR_REG_GPIO_SD_BASE + 0x0014) 102 #define GPIO_SIGMADELTA6_REG (DR_REG_GPIO_SD_BASE + 0x0018) 116 #define GPIO_SIGMADELTA7_REG (DR_REG_GPIO_SD_BASE + 0x001c) 130 #define GPIO_SIGMADELTA_CG_REG (DR_REG_GPIO_SD_BASE + 0x0020) 138 #define GPIO_SIGMADELTA_MISC_REG (DR_REG_GPIO_SD_BASE + 0x0024) [all …]
D	soc.h	`42 #define DR_REG_GPIO_SD_BASE 0x3ff44f00 macro`
/hal_espressif-3.5.0/components/soc/esp32s2/include/soc/
D	gpio_sd_reg.h	22 #define GPIO_SIGMADELTA0_REG (DR_REG_GPIO_SD_BASE + 0x0000) 36 #define GPIO_SIGMADELTA1_REG (DR_REG_GPIO_SD_BASE + 0x0004) 50 #define GPIO_SIGMADELTA2_REG (DR_REG_GPIO_SD_BASE + 0x0008) 64 #define GPIO_SIGMADELTA3_REG (DR_REG_GPIO_SD_BASE + 0x000c) 78 #define GPIO_SIGMADELTA4_REG (DR_REG_GPIO_SD_BASE + 0x0010) 92 #define GPIO_SIGMADELTA5_REG (DR_REG_GPIO_SD_BASE + 0x0014) 106 #define GPIO_SIGMADELTA6_REG (DR_REG_GPIO_SD_BASE + 0x0018) 120 #define GPIO_SIGMADELTA7_REG (DR_REG_GPIO_SD_BASE + 0x001c) 134 #define GPIO_SIGMADELTA_CG_REG (DR_REG_GPIO_SD_BASE + 0x0020) 142 #define GPIO_SIGMADELTA_MISC_REG (DR_REG_GPIO_SD_BASE + 0x0024) [all …]
D	soc.h	`49 #define DR_REG_GPIO_SD_BASE 0x3f404f00 macro`
/hal_espressif-3.5.0/components/soc/esp32s3/include/soc/
D	gpio_sd_reg.h	23 #define GPIO_SIGMADELTA0_REG (DR_REG_GPIO_SD_BASE + 0x0) 37 #define GPIO_SIGMADELTA1_REG (DR_REG_GPIO_SD_BASE + 0x4) 51 #define GPIO_SIGMADELTA2_REG (DR_REG_GPIO_SD_BASE + 0x8) 65 #define GPIO_SIGMADELTA3_REG (DR_REG_GPIO_SD_BASE + 0xC) 79 #define GPIO_SIGMADELTA4_REG (DR_REG_GPIO_SD_BASE + 0x10) 93 #define GPIO_SIGMADELTA5_REG (DR_REG_GPIO_SD_BASE + 0x14) 107 #define GPIO_SIGMADELTA6_REG (DR_REG_GPIO_SD_BASE + 0x18) 121 #define GPIO_SIGMADELTA7_REG (DR_REG_GPIO_SD_BASE + 0x1C) 135 #define GPIO_SIGMADELTA_CG_REG (DR_REG_GPIO_SD_BASE + 0x20) 143 #define GPIO_SIGMADELTA_MISC_REG (DR_REG_GPIO_SD_BASE + 0x24) [all …]
D	soc.h	`33 #define DR_REG_GPIO_SD_BASE 0x60004f00 macro`
/hal_espressif-3.5.0/components/soc/esp32h2/include/soc/
D	gpio_sd_reg.h	`22 #define GPIO_SIGMADELTA0_REG (DR_REG_GPIO_SD_BASE + 0x0000) 36 #define GPIO_SIGMADELTA1_REG (DR_REG_GPIO_SD_BASE + 0x0004) 50 #define GPIO_SIGMADELTA2_REG (DR_REG_GPIO_SD_BASE + 0x0008) 64 #define GPIO_SIGMADELTA3_REG (DR_REG_GPIO_SD_BASE + 0x000c) 78 #define GPIO_SIGMADELTA_CG_REG (DR_REG_GPIO_SD_BASE + 0x0020) 86 #define GPIO_SIGMADELTA_MISC_REG (DR_REG_GPIO_SD_BASE + 0x0024) 100 #define GPIO_SIGMADELTA_VERSION_REG (DR_REG_GPIO_SD_BASE + 0x0028)`
D	soc.h	`51 #define DR_REG_GPIO_SD_BASE 0x60004f00 macro`
/hal_espressif-3.5.0/components/soc/esp32c3/include/soc/
D	gpio_sd_reg.h	`22 #define GPIO_SIGMADELTA0_REG (DR_REG_GPIO_SD_BASE + 0x0000) 36 #define GPIO_SIGMADELTA1_REG (DR_REG_GPIO_SD_BASE + 0x0004) 50 #define GPIO_SIGMADELTA2_REG (DR_REG_GPIO_SD_BASE + 0x0008) 64 #define GPIO_SIGMADELTA3_REG (DR_REG_GPIO_SD_BASE + 0x000c) 78 #define GPIO_SIGMADELTA_CG_REG (DR_REG_GPIO_SD_BASE + 0x0020) 86 #define GPIO_SIGMADELTA_MISC_REG (DR_REG_GPIO_SD_BASE + 0x0024) 100 #define GPIO_SIGMADELTA_VERSION_REG (DR_REG_GPIO_SD_BASE + 0x0028)`

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