Searched refs:DPORT_PRO_CACHE_CTRL1_REG (Results 1 – 11 of 11) sorted by relevance
| /hal_espressif-3.5.0/zephyr/esp_shared/src/host_flash/ |
| D | cache_utils.c | 39 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_PRO_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache()
75 DPORT_SET_PERI_REG_BITS(DPORT_PRO_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
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| /hal_espressif-3.5.0/zephyr/esp_shared/components/esp_hw_support/ |
| D | sleep_modes.c | 263 _DPORT_REG_WRITE(DPORT_PRO_CACHE_CTRL1_REG, in esp_default_wake_deep_sleep()
264 _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) | DPORT_PRO_CACHE_MMU_IA_CLR); in esp_default_wake_deep_sleep()
265 _DPORT_REG_WRITE(DPORT_PRO_CACHE_CTRL1_REG, in esp_default_wake_deep_sleep()
266 _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) & (~DPORT_PRO_CACHE_MMU_IA_CLR)); in esp_default_wake_deep_sleep()
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| /hal_espressif-3.5.0/components/esp_hw_support/ |
| D | sleep_modes.c | 249 _DPORT_REG_WRITE(DPORT_PRO_CACHE_CTRL1_REG, in esp_default_wake_deep_sleep()
250 _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) | DPORT_PRO_CACHE_MMU_IA_CLR); in esp_default_wake_deep_sleep()
251 _DPORT_REG_WRITE(DPORT_PRO_CACHE_CTRL1_REG, in esp_default_wake_deep_sleep()
252 _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) & (~DPORT_PRO_CACHE_MMU_IA_CLR)); in esp_default_wake_deep_sleep()
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| /hal_espressif-3.5.0/zephyr/esp32/src/boot/ |
| D | bootloader_init.c | 92 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); in bootloader_reset_mmu()
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| /hal_espressif-3.5.0/components/esp_hw_support/port/esp32/ |
| D | cache_sram_mmu.c | 115 DPORT_REG_SET_FIELD(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CMMU_SRAM_PAGE_MODE, mask_s); in cache_sram_mmu_set()
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| D | rtc_init.c | 36 DPORT_CLEAR_PERI_REG_MASK(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CMMU_FORCE_ON); in rtc_init()
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| D | spiram_psram.c | 1095 …DPORT_CLEAR_PERI_REG_MASK(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DRAM1|DPORT_PRO_CACHE_MA… in psram_cache_init()
1097 …DPORT_SET_PERI_REG_BITS(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CMMU_SRAM_PAGE_MODE, 0, DPORT_PRO_CMM… in psram_cache_init()
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| /hal_espressif-3.5.0/components/spi_flash/ |
| D | cache_utils.c | 307 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_PRO_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache()
343 DPORT_SET_PERI_REG_BITS(DPORT_PRO_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
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| /hal_espressif-3.5.0/components/bootloader_support/src/esp32/ |
| D | bootloader_esp32.c | 124 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); in bootloader_reset_mmu()
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| /hal_espressif-3.5.0/components/bootloader_support/src/ |
| D | bootloader_utility.c | 795 DPORT_REG_CLR_BIT( DPORT_PRO_CACHE_CTRL1_REG,
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| /hal_espressif-3.5.0/components/soc/esp32/include/soc/ |
| D | dport_reg.h | 278 #define DPORT_PRO_CACHE_CTRL1_REG (DR_REG_DPORT_BASE + 0x044) macro
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