DPORT_CPU_PERI_CLK_EN_REG (reference) in projects: hal_espressif-3.5.0

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Searched refs:DPORT_CPU_PERI_CLK_EN_REG (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.5.0/components/hal/esp32s2/include/hal/
D	clk_gate_ll.h	`192 return DPORT_CPU_PERI_CLK_EN_REG; in periph_ll_get_clk_en_reg()`
/hal_espressif-3.5.0/components/soc/esp32s2/include/soc/
D	system_reg.h	`60 #define DPORT_PERI_CLK_EN_REG DPORT_CPU_PERI_CLK_EN_REG 61 #define DPORT_CPU_PERI_CLK_EN_REG (DR_REG_SYSTEM_BASE + 0x010) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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