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Searched refs:tieh (Results 1 – 13 of 13) sorted by relevance

/hal_espressif-3.4.0/components/esp_hw_support/port/esp32/
Drtc_init.c110 result.tieh = (sdio_conf_reg & RTC_CNTL_SDIO_TIEH_M) >> RTC_CNTL_SDIO_TIEH_S; in rtc_vddsdio_get_config()
118 result.tieh = (efuse_reg & EFUSE_RD_SDIO_TIEH_M) >> EFUSE_RD_SDIO_TIEH_S; in rtc_vddsdio_get_config()
134 result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V; in rtc_vddsdio_get_config()
147 val |= (config.tieh << RTC_CNTL_SDIO_TIEH_S); in rtc_vddsdio_set_config()
Dspiram_psram.c824 if (cfg.tieh != RTC_VDDSDIO_TIEH_1_8V) { in psram_enable()
836 if (cfg.tieh != RTC_VDDSDIO_TIEH_3_3V) { in psram_enable()
846 if (cfg.tieh != RTC_VDDSDIO_TIEH_3_3V) { in psram_enable()
860 if (cfg.tieh != RTC_VDDSDIO_TIEH_3_3V) { in psram_enable()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/
Drtc_init.c179 result.tieh = (sdio_conf_reg & RTC_CNTL_SDIO_TIEH_M) >> RTC_CNTL_SDIO_TIEH_S; in rtc_vddsdio_get_config()
189 result.tieh = (efuse_reg & EFUSE_SDIO_TIEH_M) >> EFUSE_SDIO_TIEH_S; in rtc_vddsdio_get_config()
202 result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V; in rtc_vddsdio_get_config()
215 val |= (config.tieh << RTC_CNTL_SDIO_TIEH_S); in rtc_vddsdio_set_config()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/
Drtc_init.c195 result.tieh = (sdio_conf_reg & RTC_CNTL_SDIO_TIEH_M) >> RTC_CNTL_SDIO_TIEH_S; in rtc_vddsdio_get_config()
202 result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V; in rtc_vddsdio_get_config()
215 val |= (config.tieh << RTC_CNTL_SDIO_TIEH_S); in rtc_vddsdio_set_config()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/
Drtc_init.c180 result.tieh = (sdio_conf_reg & RTC_CNTL_SDIO_TIEH_M) >> RTC_CNTL_SDIO_TIEH_S; in rtc_vddsdio_get_config()
189 result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V; in rtc_vddsdio_get_config()
202 val |= (config.tieh << RTC_CNTL_SDIO_TIEH_S); in rtc_vddsdio_set_config()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/
Drtc_init.c168 result.tieh = (sdio_conf_reg & RTC_CNTL_SDIO_TIEH_M) >> RTC_CNTL_SDIO_TIEH_S; in rtc_vddsdio_get_config()
177 result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V; in rtc_vddsdio_get_config()
190 val |= (config.tieh << RTC_CNTL_SDIO_TIEH_S); in rtc_vddsdio_set_config()
/hal_espressif-3.4.0/zephyr/esp32/src/boot/
Dbootloader_init.c56 if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { in bootloader_common_vddsdio_configure()
/hal_espressif-3.4.0/components/bootloader_support/src/
Dbootloader_common.c199 …if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) { // VDDSDIO regulator is enabled @ 1… in bootloader_common_vddsdio_configure()
/hal_espressif-3.4.0/components/soc/esp32/include/soc/
Drtc.h699 …uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIE… member
/hal_espressif-3.4.0/components/soc/esp32s2/include/soc/
Drtc.h867 …uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIE… member
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Drtc.h844 …uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIE… member
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Drtc.h862 …uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIE… member
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Drtc.h936 …uint32_t tieh : 1; //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIE… member