Searched refs:sys_conf (Results 1 – 6 of 6) sorted by relevance
30 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_drive_clock()31 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_drive_clock()36 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()37 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()45 return (dev->sys_conf.mem_force_pd) || !(dev->sys_conf.mem_force_pu); in rmt_ll_is_mem_power_down()50 dev->sys_conf.fifo_mask = enable; in rmt_ll_enable_mem_access()56 dev->sys_conf.sclk_active = 0; in rmt_ll_set_group_clock_src()57 dev->sys_conf.sclk_sel = src; in rmt_ll_set_group_clock_src()58 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->sys_conf, sclk_div_num, div_num); in rmt_ll_set_group_clock_src()59 dev->sys_conf.sclk_div_a = div_a; in rmt_ll_set_group_clock_src()[all …]
29 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_drive_clock()30 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_drive_clock()35 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()36 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()44 return (dev->sys_conf.mem_force_pd) || !(dev->sys_conf.mem_force_pu); in rmt_ll_is_mem_power_down()49 dev->sys_conf.fifo_mask = enable; in rmt_ll_enable_mem_access()55 dev->sys_conf.sclk_active = 0; in rmt_ll_set_group_clock_src()56 dev->sys_conf.sclk_sel = src; in rmt_ll_set_group_clock_src()57 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->sys_conf, sclk_div_num, div_num); in rmt_ll_set_group_clock_src()58 dev->sys_conf.sclk_div_a = div_a; in rmt_ll_set_group_clock_src()[all …]
27 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_drive_clock()28 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_drive_clock()33 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()34 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()42 return (dev->sys_conf.mem_force_pd) || !(dev->sys_conf.mem_force_pu); in rmt_ll_is_mem_power_down()47 dev->sys_conf.apb_fifo_mask = enable; in rmt_ll_enable_mem_access()53 dev->sys_conf.sclk_active = 0; in rmt_ll_set_group_clock_src()54 dev->sys_conf.sclk_sel = src; in rmt_ll_set_group_clock_src()55 HAL_FORCE_MODIFY_U32_REG_FIELD(dev->sys_conf, sclk_div_num, div_num); in rmt_ll_set_group_clock_src()56 dev->sys_conf.sclk_div_a = div_a; in rmt_ll_set_group_clock_src()[all …]
228 } sys_conf; member
1082 volatile rmt_sys_conf_reg_t sys_conf; member
