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Searched refs:pll_wait (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-3.4.0/components/soc/esp32/include/soc/
Drtc.h663 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
678 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-3.4.0/components/soc/esp32s2/include/soc/
Drtc.h826 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
845 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Drtc.h803 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
822 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Drtc.h821 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
840 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Drtc.h819 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
838 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32/
Drtc_init.c22 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/
Drtc_init.c30 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/
Drtc_init.c39 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/
Drtc_init.c33 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/
Drtc_init.c34 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()