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/hal_espressif-3.4.0/components/freertos/port/xtensa/
Dxtensa_vectors.S229 rsr a0, EXCSAVE_1 + \level - 1 /* Get exception frame pointer stored in EXCSAVE_x */
230 l32i a3, a0, XT_STK_A0 /* Copy pre-exception a0 (return address) */
232 l32i a3, a0, XT_STK_A1 /* Copy pre-exception a1 (stack pointer) */
238 rsr a0, EPC_1 + \level - 1 /* return address */
240 or a0, a0, a4 /* set top 2 bits */
241 addx2 a0, a4, a0 /* clear top bit -- simulating call4 size */
437 wsr a0, EXCSAVE+XCHAL_DEBUGLEVEL /* preserve a0 */
463 movi a0,PANIC_RSN_DOUBLEEXCEPTION
464 wsr a0,EXCCAUSE
485 wsr a0, EXCSAVE_1 /* preserve a0 */
[all …]
Dxtensa_vector_defaults.S37 getcoreid a0
39 beqz a0, 1f
41 bnez a0, 1f
44 rsr a0, DEBUGCAUSE
45 extui a0, a0, XT_DEBUGCAUSE_DI, 1
46 bnez a0, _xt_debug_di_exc
50 movi a0,PANIC_RSN_DEBUGEXCEPTION
51 wsr a0,EXCCAUSE
55 rsr a0,(EPC + XCHAL_DEBUGLEVEL)
56 wsr a0,EPC_1
[all …]
Dxtensa_loadstore_handler.S77 wsr a0, depc // Save return address in depc
78 mov a0, sp
80 s32i a0, sp, 0x04 // Since a0 contains value of a1
85 rsr a0, sar // Save SAR in a0 to restore later
140 wsr a0, sar
141 rsr a0, excsave1
206 wsr a0, sar
214 rsr a0, excsave1
271 wsr a0, depc // Save return address in depc
272 mov a0, sp
[all …]
Dxtensa_context.S142 mov a9, a0 /* preserve ret addr */
184 movi a0, PS_INTLEVEL_MASK
185 and a3, a2, a0 /* get the current INTLEVEL */
189 movi a0, PS_UM | PS_WOE /* clear EXCM, enable window overflow, set new INTLEVEL */
190 or a3, a3, a0
192 rsr a0, EPC1 /* to be restored after SPILL_ALL_WINDOWS */
200 wsr a0, EPC1 /* likewise */
209 mov a0, a9 /* retrieve ret addr */
256 mov a13, a0 /* preserve ret addr */
263 mov a0, a13 /* retrieve ret addr */
[all …]
Dportasm.S109 mov a12, a0
159 mov a0, a12 /* restore return addr and return */
187 rsil a0, XCHAL_EXCM_LEVEL /* lock out interrupts */
255 l32i a0, a1, XT_STK_EXIT
459 l32i a0, sp, XT_SOL_PC
505 l32i a0, sp, XT_STK_EXIT
537 s32i a0, sp, XT_SOL_PC
/hal_espressif-3.4.0/components/bt/controller/esp32/
Dhli_vectors.S63 rsr.ccount a0
64 addmi a0, a0, (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ*50)
65 wsr a0, CCOMPARE2
68 rsr a0, INTENABLE
69 extui a0, a0, 16, 1
70 bnez a0, 1f
71 movi a0, 0
72 xsr a0, INTENABLE /* disable all interrupts */
74 addmi a0, a0, (1<<14)
75 addmi a0, a0, (1<<14)
[all …]
/hal_espressif-3.4.0/components/esp_system/port/soc/esp32s3/
Dhighint_hdl.S50 rsr a0, INTERRUPT
51 extui a0, a0, ETS_IPC_ISR_INUM, 1
52 bnez a0, jump_to_esp_ipc_isr_handler
56 mov a0, sp
58 s32i a0, sp, XT_STK_A1
60 s32e a0, sp, -12 /* for debug backtrace */
62 rsr a0, PS /* save interruptee's PS */
63 s32i a0, sp, XT_STK_PS
64 rsr a0, EPC_4 /* save interruptee's PC */
65 s32i a0, sp, XT_STK_PC
[all …]
/hal_espressif-3.4.0/components/esp_system/port/soc/esp32/
Dhighint_hdl.S173 rsr a0, INTERRUPT
174 extui a0, a0, ETS_IPC_ISR_INUM, 1
175 beqz a0, 1f
181 movi a0, esp_ipc_isr_handler
182 jx a0
190 rsr a0, INTENABLE
191 extui a0, a0, 16, 1
192 beqz a0, 1f
193 rsr a0, INTERRUPT
194 extui a0, a0, 16, 1
[all …]
/hal_espressif-3.4.0/components/esp_system/port/soc/esp32s2/
Dhighint_hdl.S40 mov a0, sp
42 s32i a0, sp, XT_STK_A1
44 s32e a0, sp, -12 /* for debug backtrace */
46 rsr a0, PS /* save interruptee's PS */
47 s32i a0, sp, XT_STK_PS
48 rsr a0, EPC_4 /* save interruptee's PC */
49 s32i a0, sp, XT_STK_PC
51 s32e a0, sp, -16 /* for debug backtrace */
58 rsr a0, EXCVADDR
59 s32i a0, sp, XT_STK_EXCVADDR
[all …]
/hal_espressif-3.4.0/components/esp_hw_support/test/
Dtest_dport_xt_highint5.S29 movi a0, xt_highint5_read_apb
30 l32i a0, a0, 0
31 bnez a0, .read_apb_reg
34 movi a0, 0
35 wsr a0, CCOMPARE2
38 rsr a0, EXCSAVE_5 // restore a0
45 movi a0, _l5_intr_stack
46 s32i a2, a0, L5_INTR_A2_OFFSET
47 s32i a3, a0, L5_INTR_A3_OFFSET
48 s32i a4, a0, L5_INTR_A4_OFFSET
[all …]
/hal_espressif-3.4.0/components/esp_ipc/src/esp_ipc_isr/
Desp_ipc_isr_handler.S54 movi a0, _lx_intr_stack
55 s32i a2, a0, LX_INTR_A2_OFFSET
56 s32i a3, a0, LX_INTR_A3_OFFSET
57 s32i a4, a0, LX_INTR_A4_OFFSET
59 s32i a2, a0, LX_INTR_A0_OFFSET
64 movi a0, PS_INTLEVEL(5) | PS_UM
65 wsr a0, PS
98 movi a0, esp_ipc_isr_start_fl
99 s32i a0, a0, 0
102 movi a0, esp_ipc_func
[all …]
/hal_espressif-3.4.0/components/esp_system/port/arch/xtensa/
Dpanic_handler_asm.S28 mov a0, sp
30 s32i a0, sp, XT_STK_A1
32 s32e a0, sp, -12 /* for debug backtrace */
34 rsr a0, PS /* save interruptee's PS */
35 s32i a0, sp, XT_STK_PS
36 rsr a0, EPC_1 /* save interruptee's PC */
37 s32i a0, sp, XT_STK_PC
39 s32e a0, sp, -16 /* for debug backtrace */
46 rsr a0, EXCCAUSE
47 s32i a0, sp, XT_STK_EXCCAUSE
[all …]
/hal_espressif-3.4.0/components/esp_gdbstub/xtensa/
Dgdbstub-entry.S13 mov a0, sp
15 s32i a0, sp, XT_STK_A1
17 s32e a0, sp, -12 /* for debug backtrace */
19 rsr a0, PS /* save interruptee's PS */
20 s32i a0, sp, XT_STK_PS
21 rsr a0, EPC_1 /* save interruptee's PC */
22 s32i a0, sp, XT_STK_PC
24 s32e a0, sp, -16 /* for debug backtrace */
30 rsr a0, EXCCAUSE
31 s32i a0, sp, XT_STK_EXCCAUSE
[all …]
Dgdbstub_xtensa.c50 const uint32_t *a_regs = (const uint32_t *) &frame->a0; in esp_gdbstub_frame_to_regfile()
84 const uint32_t *a_regs = (const uint32_t *) &frame->a0; in solicited_frame_to_regfile()
/hal_espressif-3.4.0/components/xtensa/include/xtensa/
Dcoreasm.h334 l32i a0, a0, 0 // load constant
336 movi a0, \constant // no LITBASE, can assume PC-relative L32R
459 bbci.l a0, 31, 1f // branch if called with call4
460 bbsi.l a0, 30, 2f // branch if called with call12
469 bbci.l a0, 31, 1f // branch if called with call4
470 bbsi.l a0, 30, 2f // branch if called with call12
479 bbci.l a0, 31, 1f // branch if called with call4
480 bbsi.l a0, 30, 2f // branch if called with call12
950 s32i a0, sp, .locsz - 4
955 s32i a0, sp, 12
[all …]
Dxtensa_context.h107 STRUCT_FIELD (long, 4, XT_STK_A0, a0)
217 STRUCT_FIELD (long, 4, XT_SOL_A0, a0) /* should be on 16-byte alignment */
363 s32i a0, sp, 0
368 l32i a0, sp, 0
Dcacheasm.h158 .macro cache_index_all cainst, size, linesize, assoc_or1, aa, ab, loopokay, maxofs, awb=a0
200 .ifne ((\awb !=a0) & XCHAL_ERRATUM_497) // don't use awb if set to a0
207 .ifne ((\awb !=a0) & XCHAL_ERRATUM_497) // do memw after 8 cainst wb instructions
245 .macro cache_hit_region cainst, linesize_log2, addr, asize, askew, awb=a0
254 .ifne ((\awb !=a0) & XCHAL_ERRATUM_497) // don't use awb if set to a0
259 .ifne ((\awb !=a0) & XCHAL_ERRATUM_497) // do memw after 8 cainst wb instructions
/hal_espressif-3.4.0/components/riscv/
Dvectors.S35 sw a0, RV_STK_A0(sp)
72 lw a0, RV_STK_A0(sp)
154 sw a0, RV_STK_A0(sp)
194 mv a0, sp
228 mv a0, sp
254 li a0, 0 /* = ESP_PM_TRACE_IDLE */
270 mv a0, sp /* argument 1, stack pointer */
288 mv a0, sp
292 mv sp, a0
/hal_espressif-3.4.0/components/freertos/port/riscv/
Dportasm.S36 mv t2, a0
106 lw a0, pxCurrentTCB
107 lw a0, 0x0(a0)
/hal_espressif-3.4.0/examples/wifi/wifi_enterprise/main/
Dclient.crt16 e2:a0:56:c5:9b:2b:6f:e0:84:25:4d:69:f4:4f:22:
19 d9:4f:9d:27:c7:bf:a0:fc:89:fa:1a:62:4f:cd:96:
23 7a:bd:57:4a:a0:15:ee:12:ee:3d:1e:50:a5:2c:13:
25 5f:e8:a0:4e:b8:0d:87:ca:78:d3:83:92:e3:ba:c5:
30 92:fe:a0:29:15:6c:47:5d:b8:1f:dd:b4:2e:ff:91:
47 ff:11:da:1a:66:1d:4b:79:0c:eb:2d:36:03:91:a9:6f:a0:63:
53 62:7b:24:be:fa:5a:c6:95:ae:a0:fa:80:0a:19:2d:00:3f:50:
Dclient.pem16 e2:a0:56:c5:9b:2b:6f:e0:84:25:4d:69:f4:4f:22:
19 d9:4f:9d:27:c7:bf:a0:fc:89:fa:1a:62:4f:cd:96:
23 7a:bd:57:4a:a0:15:ee:12:ee:3d:1e:50:a5:2c:13:
25 5f:e8:a0:4e:b8:0d:87:ca:78:d3:83:92:e3:ba:c5:
30 92:fe:a0:29:15:6c:47:5d:b8:1f:dd:b4:2e:ff:91:
47 ff:11:da:1a:66:1d:4b:79:0c:eb:2d:36:03:91:a9:6f:a0:63:
53 62:7b:24:be:fa:5a:c6:95:ae:a0:fa:80:0a:19:2d:00:3f:50:
/hal_espressif-3.4.0/components/esp_rom/patches/
Desp_rom_longjmp.S71 movi a0, __real_longjmp + 20
72 jx a0
87 l32i a0, a2, 64
104 extui a7, a0, 30, 2
/hal_espressif-3.4.0/tools/test_apps/system/memprot/main/esp32c3/
Dreturn_from_panic.S33 or t0, a0, a0 /* use t0 as the working register */
42 lw a0, RV_STK_A0(t0)
/hal_espressif-3.4.0/zephyr/esp32/src/hal/
Dwindowspill_asm.S259 s32i a0, a13, 0 // store call[i]'s a0
373 mov a4, a0 // save a0
379 mov a0, a4 // restore a0
/hal_espressif-3.4.0/components/espcoredump/src/port/xtensa/
Dcore_dump_port.c131 ….a0 = (UBaseType_t) 0, // to terminate GDB backtr…
399 sol_frame->a0, in esp_core_dump_check_task()
410 exc_frame->a0, in esp_core_dump_check_task()
500 a_reg = &stack->a0; in esp_core_dump_summary_parse_exc_regs()
523 frame.next_pc = stack->a0; in esp_core_dump_summary_parse_backtrace_info()

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