Home
last modified time | relevance | path

Searched refs:MEMCTL_ICWU_CLR_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-2.7.6/components/xtensa/include/xtensa/
Dcorebits.h189 #define MEMCTL_ICWU_CLR_MASK ~(MEMCTL_ICWU_MASK) macro
191 #define MEMCTL_IDCW_CLR_MASK (MEMCTL_DCW_CLR_MASK | MEMCTL_ICWU_CLR_MASK)
Dcacheasm.h871 movi \ac, MEMCTL_ICWU_CLR_MASK // set up to clear bits 18-22