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Searched refs:DR_REG_EFUSE_BASE (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-2.7.6/components/soc/esp32/include/soc/
Defuse_reg.h19 #define EFUSE_BLK0_RDATA0_REG (DR_REG_EFUSE_BASE + 0x000)
65 #define EFUSE_BLK0_RDATA1_REG (DR_REG_EFUSE_BASE + 0x004)
73 #define EFUSE_BLK0_RDATA2_REG (DR_REG_EFUSE_BASE + 0x008)
81 #define EFUSE_BLK0_RDATA3_REG (DR_REG_EFUSE_BASE + 0x00c)
149 #define EFUSE_BLK0_RDATA4_REG (DR_REG_EFUSE_BASE + 0x010)
202 #define EFUSE_BLK0_RDATA5_REG (DR_REG_EFUSE_BASE + 0x014)
256 #define EFUSE_BLK0_RDATA6_REG (DR_REG_EFUSE_BASE + 0x018)
322 #define EFUSE_BLK0_WDATA0_REG (DR_REG_EFUSE_BASE + 0x01c)
342 #define EFUSE_BLK0_WDATA1_REG (DR_REG_EFUSE_BASE + 0x020)
350 #define EFUSE_BLK0_WDATA2_REG (DR_REG_EFUSE_BASE + 0x024)
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Dsoc.h63 #define DR_REG_EFUSE_BASE 0x3ff5A000 macro
/hal_espressif-2.7.6/components/soc/esp32c3/include/soc/
Defuse_reg.h22 #define EFUSE_PGM_DATA0_REG (DR_REG_EFUSE_BASE + 0x000)
30 #define EFUSE_PGM_DATA1_REG (DR_REG_EFUSE_BASE + 0x004)
157 #define EFUSE_PGM_DATA2_REG (DR_REG_EFUSE_BASE + 0x008)
209 #define EFUSE_PGM_DATA3_REG (DR_REG_EFUSE_BASE + 0x00C)
266 #define EFUSE_PGM_DATA4_REG (DR_REG_EFUSE_BASE + 0x010)
354 #define EFUSE_PGM_DATA5_REG (DR_REG_EFUSE_BASE + 0x014)
362 #define EFUSE_PGM_DATA6_REG (DR_REG_EFUSE_BASE + 0x018)
370 #define EFUSE_PGM_DATA7_REG (DR_REG_EFUSE_BASE + 0x01C)
378 #define EFUSE_PGM_CHECK_VALUE0_REG (DR_REG_EFUSE_BASE + 0x020)
386 #define EFUSE_PGM_CHECK_VALUE1_REG (DR_REG_EFUSE_BASE + 0x024)
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Dsoc.h57 #define DR_REG_EFUSE_BASE 0x60008800 macro
/hal_espressif-2.7.6/components/soc/esp32s3/include/soc/
Defuse_reg.h22 #define EFUSE_PGM_DATA0_REG (DR_REG_EFUSE_BASE + 0x000)
30 #define EFUSE_PGM_DATA1_REG (DR_REG_EFUSE_BASE + 0x004)
158 #define EFUSE_PGM_DATA2_REG (DR_REG_EFUSE_BASE + 0x008)
264 #define EFUSE_PGM_DATA3_REG (DR_REG_EFUSE_BASE + 0x00C)
321 #define EFUSE_PGM_DATA4_REG (DR_REG_EFUSE_BASE + 0x010)
409 #define EFUSE_PGM_DATA5_REG (DR_REG_EFUSE_BASE + 0x014)
417 #define EFUSE_PGM_DATA6_REG (DR_REG_EFUSE_BASE + 0x018)
425 #define EFUSE_PGM_DATA7_REG (DR_REG_EFUSE_BASE + 0x01C)
433 #define EFUSE_PGM_CHECK_VALUE0_REG (DR_REG_EFUSE_BASE + 0x020)
441 #define EFUSE_PGM_CHECK_VALUE1_REG (DR_REG_EFUSE_BASE + 0x024)
[all …]
Dsoc.h74 #define DR_REG_EFUSE_BASE 0x6001A000 macro
/hal_espressif-2.7.6/components/soc/esp32s2/include/soc/
Defuse_reg.h22 #define EFUSE_PGM_DATA0_REG (DR_REG_EFUSE_BASE + 0x000)
30 #define EFUSE_PGM_DATA1_REG (DR_REG_EFUSE_BASE + 0x004)
178 #define EFUSE_PGM_DATA2_REG (DR_REG_EFUSE_BASE + 0x008)
283 #define EFUSE_PGM_DATA3_REG (DR_REG_EFUSE_BASE + 0x00c)
340 #define EFUSE_PGM_DATA4_REG (DR_REG_EFUSE_BASE + 0x010)
415 #define EFUSE_PGM_DATA5_REG (DR_REG_EFUSE_BASE + 0x014)
429 #define EFUSE_PGM_DATA6_REG (DR_REG_EFUSE_BASE + 0x018)
437 #define EFUSE_PGM_DATA7_REG (DR_REG_EFUSE_BASE + 0x01c)
445 #define EFUSE_PGM_CHECK_VALUE0_REG (DR_REG_EFUSE_BASE + 0x020)
453 #define EFUSE_PGM_CHECK_VALUE1_REG (DR_REG_EFUSE_BASE + 0x024)
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Dsoc.h69 #define DR_REG_EFUSE_BASE 0x3f41A000 macro