Searched refs:DPORT_PRO_CACHE_CTRL1_REG (Results 1 – 9 of 9) sorted by relevance
| /hal_espressif-2.7.6/zephyr/esp32/include/common/ |
| D | cache_utils.h | 21 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_PRO_CACHE_CTRL1_REG, DPORT_CACHE_MASK, 0); in esp32_disable_cache()
40 DPORT_SET_PERI_REG_BITS(DPORT_PRO_CACHE_CTRL1_REG, DPORT_CACHE_MASK, saved_state, 0); in esp32_restore_cache()
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| /hal_espressif-2.7.6/components/esp32/ |
| D | cache_sram_mmu.c | 123 DPORT_REG_SET_FIELD(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CMMU_SRAM_PAGE_MODE, mask_s); in cache_sram_mmu_set()
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| D | spiram_psram.c | 1080 …DPORT_CLEAR_PERI_REG_MASK(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DRAM1|DPORT_PRO_CACHE_MA… in psram_cache_init()
1082 …DPORT_SET_PERI_REG_BITS(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CMMU_SRAM_PAGE_MODE, 0, DPORT_PRO_CMM… in psram_cache_init()
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| /hal_espressif-2.7.6/components/esp_system/ |
| D | sleep_modes.c | 293 _DPORT_REG_WRITE(DPORT_PRO_CACHE_CTRL1_REG, in esp_default_wake_deep_sleep()
294 _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) | DPORT_PRO_CACHE_MMU_IA_CLR); in esp_default_wake_deep_sleep()
295 _DPORT_REG_WRITE(DPORT_PRO_CACHE_CTRL1_REG, in esp_default_wake_deep_sleep()
296 _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) & (~DPORT_PRO_CACHE_MMU_IA_CLR)); in esp_default_wake_deep_sleep()
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| /hal_espressif-2.7.6/components/esp_hw_support/port/esp32/ |
| D | rtc_init.c | 44 DPORT_CLEAR_PERI_REG_MASK(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CMMU_FORCE_ON); in rtc_init()
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| /hal_espressif-2.7.6/components/spi_flash/ |
| D | cache_utils.c | 299 ret |= DPORT_GET_PERI_REG_BITS2(DPORT_PRO_CACHE_CTRL1_REG, cache_mask, 0); in spi_flash_disable_cache()
335 DPORT_SET_PERI_REG_BITS(DPORT_PRO_CACHE_CTRL1_REG, cache_mask, saved_state, 0); in spi_flash_restore_cache()
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| /hal_espressif-2.7.6/components/bootloader_support/src/esp32/ |
| D | bootloader_esp32.c | 128 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); in bootloader_reset_mmu()
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| /hal_espressif-2.7.6/components/bootloader_support/src/ |
| D | bootloader_utility.c | 769 DPORT_REG_CLR_BIT( DPORT_PRO_CACHE_CTRL1_REG,
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| /hal_espressif-2.7.6/components/soc/esp32/include/soc/ |
| D | dport_reg.h | 278 #define DPORT_PRO_CACHE_CTRL1_REG (DR_REG_DPORT_BASE + 0x044) macro
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