/hal_atmel-latest/asf/sam0/include/samd21/ |
D | samd21e15a.h | 396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samd21e16a.h | 396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samd21e17a.h | 396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samd21e18a.h | 396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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/hal_atmel-latest/asf/sam0/include/samc20/ |
D | samc20e15a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20e16a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20e17a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20e18a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20j18a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20j18au.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20g15a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20g16a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20g17a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20g18a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20j15a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20j16a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20j17a.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samc20j17au.h | 414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro 536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro 538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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/hal_atmel-latest/asf/sam0/include/samr21/ |
D | samr21g16a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samr21e16a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samr21e17a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samr21e18a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samr21e19a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samr21g17a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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D | samr21g18a.h | 414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro 522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro 524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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