Home
last modified time | relevance | path

Searched refs:TCC2 (Results 1 – 25 of 94) sorted by relevance

1234

/hal_atmel-latest/asf/sam0/include/samd21/
Dsamd21e15a.h396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamd21e16a.h396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamd21e17a.h396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamd21e18a.h396 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
500 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
502 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
/hal_atmel-latest/asf/sam0/include/samc20/
Dsamc20e15a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20e16a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20e17a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20e18a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20j18a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20j18au.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20g15a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20g16a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20g17a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20g18a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20j15a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20j16a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20j17a.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamc20j17au.h414 #define TCC2 (0x42002C00) /**< \brief (TCC2) APB Base Address */ macro
536 #define TCC2 ((Tcc *)0x42002C00UL) /**< \brief (TCC2) APB Base Address */ macro
538 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
/hal_atmel-latest/asf/sam0/include/samr21/
Dsamr21g16a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamr21e16a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamr21e17a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamr21e18a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamr21e19a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamr21g17a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
Dsamr21g18a.h414 #define TCC2 (0x42002800) /**< \brief (TCC2) APB Base Address */ macro
522 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */ macro
524 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */

1234