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Searched refs:SPI_IMR_UNDES (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam3x/component/
Dspi.h120 #define SPI_IMR_UNDES (0x1u << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ macro
/hal_atmel-latest/asf/sam/include/sam4e/component/
Dspi.h147 #define SPI_IMR_UNDES (0x1u << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ macro
/hal_atmel-latest/asf/sam/include/sam4s/component/
Dspi.h147 #define SPI_IMR_UNDES (0x1u << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ macro
/hal_atmel-latest/asf/sam/include/same70/component/
Dspi.h404 #define SPI_IMR_UNDES SPI_IMR_UNDES_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/samv71b/component/
Dspi.h407 #define SPI_IMR_UNDES SPI_IMR_UNDES_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/same70b/component/
Dspi.h407 #define SPI_IMR_UNDES SPI_IMR_UNDES_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/samv71/component/
Dspi.h404 #define SPI_IMR_UNDES SPI_IMR_UNDES_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/sam4l/component/
Dspi.h566 #define SPI_IMR_UNDES (_U_(0x1) << SPI_IMR_UNDES_Pos) macro