Searched refs:REG_TWI0_IMR (Results 1 – 3 of 3) sorted by relevance
43 #define REG_TWI0_IMR (0x400A802CU) /**< \brief (TWI0) Interrupt Mask Register */ macro67 #define REG_TWI0_IMR (*(RoReg*)0x400A802CU) /**< \brief (TWI0) Interrupt Mask Register */ macro
43 #define REG_TWI0_IMR (0x4001802CU) /**< \brief (TWI0) Interrupt Mask Register */ macro65 #define REG_TWI0_IMR (*(__I uint32_t*)0x4001802CU) /**< \brief (TWI0) Interrupt Mask Register */ macro
43 #define REG_TWI0_IMR (0x4008C02CU) /**< \brief (TWI0) Interrupt Mask Register */ macro65 #define REG_TWI0_IMR (*(__I uint32_t*)0x4008C02CU) /**< \brief (TWI0) Interrupt Mask Register */ macro
