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Searched refs:REG_TCC0_INTENCLR (Results 1 – 13 of 13) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samc20n/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42002424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42002424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samc20/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42002424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42002424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samc21/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42002424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42002424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42001424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42001424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samr21/instance/
Dtcc0.h44 #define REG_TCC0_INTENCLR (0x42002024) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42002024UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42002424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42002424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samd21/instance/
Dtcc0.h44 #define REG_TCC0_INTENCLR (0x42002024) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42002024UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samr35/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42001424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42001424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x42001424) /**< \brief (TCC0) Interrupt Enable Clear */ macro
74 #define REG_TCC0_INTENCLR (*(RwReg *)0x42001424UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x41016024) /**< \brief (TCC0) Interrupt Enable Clear */ macro
78 #define REG_TCC0_INTENCLR (*(RwReg *)0x41016024UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x41016024) /**< \brief (TCC0) Interrupt Enable Clear */ macro
78 #define REG_TCC0_INTENCLR (*(RwReg *)0x41016024UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x41016024) /**< \brief (TCC0) Interrupt Enable Clear */ macro
78 #define REG_TCC0_INTENCLR (*(RwReg *)0x41016024UL) /**< \brief (TCC0) Interrupt Enable Cl… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dtcc0.h45 #define REG_TCC0_INTENCLR (0x41016024) /**< \brief (TCC0) Interrupt Enable Clear */ macro
78 #define REG_TCC0_INTENCLR (*(RwReg *)0x41016024UL) /**< \brief (TCC0) Interrupt Enable Cl… macro