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Searched refs:REG_TCC0_DRVCTRL (Results 1 – 13 of 13) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samc20n/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42002418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samc20/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42002418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samc21/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42002418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42001418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42001418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samr21/instance/
Dtcc0.h41 #define REG_TCC0_DRVCTRL (0x42002018) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002018UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42002418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samd21/instance/
Dtcc0.h41 #define REG_TCC0_DRVCTRL (0x42002018) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002018UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samr35/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42001418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42001418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x42001418) /**< \brief (TCC0) Driver Control */ macro
71 #define REG_TCC0_DRVCTRL (*(RwReg *)0x42001418UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x41016018) /**< \brief (TCC0) Driver Control */ macro
75 #define REG_TCC0_DRVCTRL (*(RwReg *)0x41016018UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x41016018) /**< \brief (TCC0) Driver Control */ macro
75 #define REG_TCC0_DRVCTRL (*(RwReg *)0x41016018UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x41016018) /**< \brief (TCC0) Driver Control */ macro
75 #define REG_TCC0_DRVCTRL (*(RwReg *)0x41016018UL) /**< \brief (TCC0) Driver Control */ macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dtcc0.h42 #define REG_TCC0_DRVCTRL (0x41016018) /**< \brief (TCC0) Driver Control */ macro
75 #define REG_TCC0_DRVCTRL (*(RwReg *)0x41016018UL) /**< \brief (TCC0) Driver Control */ macro