Searched refs:REG_TC1_SR2 (Results 1 – 8 of 8) sorted by relevance
63 #define REG_TC1_SR2 (0x400140A0) /**< \brief (TC1) Status Register Channel 2 */ macro102 #define REG_TC1_SR2 (*(RoReg *)0x400140A0UL) /**< \brief (TC1) Status Register Chan… macro
64 …#define REG_TC1_SR2 (0x400140A0U) /**< \brief (TC1) Status Register (channel = … macro106 …#define REG_TC1_SR2 (*(__I uint32_t*)0x400140A0U) /**< \brief (TC1) Status Register (channel = … macro
64 …#define REG_TC1_SR2 (0x400840A0U) /**< \brief (TC1) Status Register (channel = … macro106 …#define REG_TC1_SR2 (*(__I uint32_t*)0x400840A0U) /**< \brief (TC1) Status Register (channel = … macro
69 #define REG_TC1_SR2 (0x400940A0U) /**< \brief (TC1) Status Register (channel = 2) */ macro135 #define REG_TC1_SR2 (*(RoReg*)0x400940A0U) /**< \brief (TC1) Status Register (channel = 2) */ macro
71 #define REG_TC1_SR2 (0x400100A0) /**< (TC1) Status Register (channel = 0) 2 */ macro121 #define REG_TC1_SR2 (*(__I uint32_t*)0x400100A0U) /**< (TC1) Status Register (channel … macro
71 #define REG_TC1_SR2 (0x400100A0) /**< (TC1) Status Register (channel = 0) 2 */ macro122 #define REG_TC1_SR2 (*(__I uint32_t*)0x400100A0U) /**< (TC1) Status Register (channel … macro
