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Searched refs:REG_TC1_RA0 (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4l/instance/
Dtc1.h38 #define REG_TC1_RA0 (0x40014014) /**< \brief (TC1) Register A Channel 0 */ macro
77 #define REG_TC1_RA0 (*(RwReg *)0x40014014UL) /**< \brief (TC1) Register A Channel 0… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dtc1.h39 #define REG_TC1_RA0 (0x40014014U) /**< \brief (TC1) Register A (channel = 0) */ macro
81 #define REG_TC1_RA0 (*(__IO uint32_t*)0x40014014U) /**< \brief (TC1) Register A (channel = 0) */ macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dtc1.h39 #define REG_TC1_RA0 (0x40084014U) /**< \brief (TC1) Register A (channel = 0) */ macro
81 #define REG_TC1_RA0 (*(__IO uint32_t*)0x40084014U) /**< \brief (TC1) Register A (channel = 0) */ macro
/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dtc1.h40 #define REG_TC1_RA0 (0x40094014U) /**< \brief (TC1) Register A (channel = 0) */ macro
106 #define REG_TC1_RA0 (*(RwReg*)0x40094014U) /**< \brief (TC1) Register A (channel = 0) */ macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dtc1.h42 #define REG_TC1_RA0 (0x40010014) /**< (TC1) Register A (channel = 0) 0 */ macro
92 #define REG_TC1_RA0 (*(__IO uint32_t*)0x40010014U) /**< (TC1) Register A (channel = 0) … macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dtc1.h42 #define REG_TC1_RA0 (0x40010014) /**< (TC1) Register A (channel = 0) 0 */ macro
93 #define REG_TC1_RA0 (*(__IO uint32_t*)0x40010014U) /**< (TC1) Register A (channel = 0) … macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dtc1.h42 #define REG_TC1_RA0 (0x40010014) /**< (TC1) Register A (channel = 0) 0 */ macro
92 #define REG_TC1_RA0 (*(__IO uint32_t*)0x40010014U) /**< (TC1) Register A (channel = 0) … macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dtc1.h42 #define REG_TC1_RA0 (0x40010014) /**< (TC1) Register A (channel = 0) 0 */ macro
92 #define REG_TC1_RA0 (*(__IO uint32_t*)0x40010014U) /**< (TC1) Register A (channel = 0) … macro