Searched refs:REG_TC1_QIDR (Results 1 – 7 of 7) sorted by relevance
71 …#define REG_TC1_QIDR (0x400140CCU) /**< \brief (TC1) QDEC Interrupt Disable Regi… macro113 …#define REG_TC1_QIDR (*(__O uint32_t*)0x400140CCU) /**< \brief (TC1) QDEC Interrupt Disable Regi… macro
71 …#define REG_TC1_QIDR (0x400840CCU) /**< \brief (TC1) QDEC Interrupt Disable Regi… macro113 …#define REG_TC1_QIDR (*(__O uint32_t*)0x400840CCU) /**< \brief (TC1) QDEC Interrupt Disable Regi… macro
77 #define REG_TC1_QIDR (0x400940CCU) /**< \brief (TC1) QDEC Interrupt Disable Register */ macro143 #define REG_TC1_QIDR (*(WoReg*)0x400940CCU) /**< \brief (TC1) QDEC Interrupt Disable Register */ macro
79 #define REG_TC1_QIDR (0x400100CC) /**< (TC1) QDEC Interrupt Disable Register */ macro129 #define REG_TC1_QIDR (*(__O uint32_t*)0x400100CCU) /**< (TC1) QDEC Interrupt Disable Re… macro
79 #define REG_TC1_QIDR (0x400100CC) /**< (TC1) QDEC Interrupt Disable Register */ macro130 #define REG_TC1_QIDR (*(__O uint32_t*)0x400100CCU) /**< (TC1) QDEC Interrupt Disable Re… macro
