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Searched refs:REG_TC1_INTENCLR (Results 1 – 12 of 12) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd20/instance/
Dtc1.h42 #define REG_TC1_INTENCLR (0x4200240C) /**< \brief (TC1) Interrupt Enable Clear */ macro
64 #define REG_TC1_INTENCLR (*(RwReg8 *)0x4200240CUL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x40003C08) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x40003C08UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samc20n/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42003408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42003408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42002408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42002408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samc20/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42003408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42003408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samc21/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42003408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42003408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x40003C08) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x40003C08UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42003408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42003408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/samr35/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42002408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42002408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x42002408) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x42002408UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x40003C08) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x40003C08UL) /**< \brief (TC1) Interrupt Enable Cle… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dtc1.h39 #define REG_TC1_INTENCLR (0x40003C08) /**< \brief (TC1) Interrupt Enable Clear */ macro
69 #define REG_TC1_INTENCLR (*(RwReg8 *)0x40003C08UL) /**< \brief (TC1) Interrupt Enable Cle… macro