Searched refs:REG_TC1_IMR2 (Results 1 – 8 of 8) sorted by relevance
66 #define REG_TC1_IMR2 (0x400140AC) /**< \brief (TC1) Interrupt Mask Register Channel 2… macro105 #define REG_TC1_IMR2 (*(RoReg *)0x400140ACUL) /**< \brief (TC1) Interrupt Mask Regis… macro
67 …#define REG_TC1_IMR2 (0x400140ACU) /**< \brief (TC1) Interrupt Mask Register (ch… macro109 …#define REG_TC1_IMR2 (*(__I uint32_t*)0x400140ACU) /**< \brief (TC1) Interrupt Mask Register (ch… macro
67 …#define REG_TC1_IMR2 (0x400840ACU) /**< \brief (TC1) Interrupt Mask Register (ch… macro109 …#define REG_TC1_IMR2 (*(__I uint32_t*)0x400840ACU) /**< \brief (TC1) Interrupt Mask Register (ch… macro
72 #define REG_TC1_IMR2 (0x400940ACU) /**< \brief (TC1) Interrupt Mask Register (channel = 2… macro138 #define REG_TC1_IMR2 (*(RoReg*)0x400940ACU) /**< \brief (TC1) Interrupt Mask Register (channel = 2… macro
74 #define REG_TC1_IMR2 (0x400100AC) /**< (TC1) Interrupt Mask Register (channel = 0) 2 */ macro124 #define REG_TC1_IMR2 (*(__I uint32_t*)0x400100ACU) /**< (TC1) Interrupt Mask Register (… macro
74 #define REG_TC1_IMR2 (0x400100AC) /**< (TC1) Interrupt Mask Register (channel = 0) 2 */ macro125 #define REG_TC1_IMR2 (*(__I uint32_t*)0x400100ACU) /**< (TC1) Interrupt Mask Register (… macro
