Searched refs:REG_TC1_IER2 (Results 1 – 8 of 8) sorted by relevance
64 #define REG_TC1_IER2 (0x400140A4) /**< \brief (TC1) Interrupt Enable Register Channel… macro103 #define REG_TC1_IER2 (*(WoReg *)0x400140A4UL) /**< \brief (TC1) Interrupt Enable Reg… macro
65 …#define REG_TC1_IER2 (0x400140A4U) /**< \brief (TC1) Interrupt Enable Register (… macro107 …#define REG_TC1_IER2 (*(__O uint32_t*)0x400140A4U) /**< \brief (TC1) Interrupt Enable Register (… macro
65 …#define REG_TC1_IER2 (0x400840A4U) /**< \brief (TC1) Interrupt Enable Register (… macro107 …#define REG_TC1_IER2 (*(__O uint32_t*)0x400840A4U) /**< \brief (TC1) Interrupt Enable Register (… macro
70 #define REG_TC1_IER2 (0x400940A4U) /**< \brief (TC1) Interrupt Enable Register (channel =… macro136 #define REG_TC1_IER2 (*(WoReg*)0x400940A4U) /**< \brief (TC1) Interrupt Enable Register (channel =… macro
72 #define REG_TC1_IER2 (0x400100A4) /**< (TC1) Interrupt Enable Register (channel = 0) 2 */ macro122 #define REG_TC1_IER2 (*(__O uint32_t*)0x400100A4U) /**< (TC1) Interrupt Enable Register… macro
72 #define REG_TC1_IER2 (0x400100A4) /**< (TC1) Interrupt Enable Register (channel = 0) 2 */ macro123 #define REG_TC1_IER2 (*(__O uint32_t*)0x400100A4U) /**< (TC1) Interrupt Enable Register… macro
