Searched refs:REG_TC1_IER1 (Results 1 – 8 of 8) sorted by relevance
53 #define REG_TC1_IER1 (0x40014064) /**< \brief (TC1) Interrupt Enable Register Channel… macro92 #define REG_TC1_IER1 (*(WoReg *)0x40014064UL) /**< \brief (TC1) Interrupt Enable Reg… macro
54 …#define REG_TC1_IER1 (0x40014064U) /**< \brief (TC1) Interrupt Enable Register (… macro96 …#define REG_TC1_IER1 (*(__O uint32_t*)0x40014064U) /**< \brief (TC1) Interrupt Enable Register (… macro
54 …#define REG_TC1_IER1 (0x40084064U) /**< \brief (TC1) Interrupt Enable Register (… macro96 …#define REG_TC1_IER1 (*(__O uint32_t*)0x40084064U) /**< \brief (TC1) Interrupt Enable Register (… macro
57 #define REG_TC1_IER1 (0x40094064U) /**< \brief (TC1) Interrupt Enable Register (channel =… macro123 #define REG_TC1_IER1 (*(WoReg*)0x40094064U) /**< \brief (TC1) Interrupt Enable Register (channel =… macro
59 #define REG_TC1_IER1 (0x40010064) /**< (TC1) Interrupt Enable Register (channel = 0) 1 */ macro109 #define REG_TC1_IER1 (*(__O uint32_t*)0x40010064U) /**< (TC1) Interrupt Enable Register… macro
59 #define REG_TC1_IER1 (0x40010064) /**< (TC1) Interrupt Enable Register (channel = 0) 1 */ macro110 #define REG_TC1_IER1 (*(__O uint32_t*)0x40010064U) /**< (TC1) Interrupt Enable Register… macro
