Searched refs:REG_TC1_IER0 (Results 1 – 8 of 8) sorted by relevance
42 #define REG_TC1_IER0 (0x40014024) /**< \brief (TC1) Interrupt Enable Register Channel… macro81 #define REG_TC1_IER0 (*(WoReg *)0x40014024UL) /**< \brief (TC1) Interrupt Enable Reg… macro
43 …#define REG_TC1_IER0 (0x40014024U) /**< \brief (TC1) Interrupt Enable Register (… macro85 …#define REG_TC1_IER0 (*(__O uint32_t*)0x40014024U) /**< \brief (TC1) Interrupt Enable Register (… macro
43 …#define REG_TC1_IER0 (0x40084024U) /**< \brief (TC1) Interrupt Enable Register (… macro85 …#define REG_TC1_IER0 (*(__O uint32_t*)0x40084024U) /**< \brief (TC1) Interrupt Enable Register (… macro
44 #define REG_TC1_IER0 (0x40094024U) /**< \brief (TC1) Interrupt Enable Register (channel =… macro110 #define REG_TC1_IER0 (*(WoReg*)0x40094024U) /**< \brief (TC1) Interrupt Enable Register (channel =… macro
46 #define REG_TC1_IER0 (0x40010024) /**< (TC1) Interrupt Enable Register (channel = 0) 0 */ macro96 #define REG_TC1_IER0 (*(__O uint32_t*)0x40010024U) /**< (TC1) Interrupt Enable Register… macro
46 #define REG_TC1_IER0 (0x40010024) /**< (TC1) Interrupt Enable Register (channel = 0) 0 */ macro97 #define REG_TC1_IER0 (*(__O uint32_t*)0x40010024U) /**< (TC1) Interrupt Enable Register… macro
