Searched refs:REG_TC1_IDR2 (Results 1 – 8 of 8) sorted by relevance
65 #define REG_TC1_IDR2 (0x400140A8) /**< \brief (TC1) Interrupt Disable Register Channe… macro104 #define REG_TC1_IDR2 (*(WoReg *)0x400140A8UL) /**< \brief (TC1) Interrupt Disable Re… macro
66 …#define REG_TC1_IDR2 (0x400140A8U) /**< \brief (TC1) Interrupt Disable Register … macro108 …#define REG_TC1_IDR2 (*(__O uint32_t*)0x400140A8U) /**< \brief (TC1) Interrupt Disable Register … macro
66 …#define REG_TC1_IDR2 (0x400840A8U) /**< \brief (TC1) Interrupt Disable Register … macro108 …#define REG_TC1_IDR2 (*(__O uint32_t*)0x400840A8U) /**< \brief (TC1) Interrupt Disable Register … macro
71 #define REG_TC1_IDR2 (0x400940A8U) /**< \brief (TC1) Interrupt Disable Register (channel … macro137 #define REG_TC1_IDR2 (*(WoReg*)0x400940A8U) /**< \brief (TC1) Interrupt Disable Register (channel … macro
73 #define REG_TC1_IDR2 (0x400100A8) /**< (TC1) Interrupt Disable Register (channel = 0) 2 … macro123 #define REG_TC1_IDR2 (*(__O uint32_t*)0x400100A8U) /**< (TC1) Interrupt Disable Registe… macro
73 #define REG_TC1_IDR2 (0x400100A8) /**< (TC1) Interrupt Disable Register (channel = 0) 2 … macro124 #define REG_TC1_IDR2 (*(__O uint32_t*)0x400100A8U) /**< (TC1) Interrupt Disable Registe… macro
