Searched refs:REG_TC1_IDR0 (Results 1 – 8 of 8) sorted by relevance
43 #define REG_TC1_IDR0 (0x40014028) /**< \brief (TC1) Interrupt Disable Register Channe… macro82 #define REG_TC1_IDR0 (*(WoReg *)0x40014028UL) /**< \brief (TC1) Interrupt Disable Re… macro
44 …#define REG_TC1_IDR0 (0x40014028U) /**< \brief (TC1) Interrupt Disable Register … macro86 …#define REG_TC1_IDR0 (*(__O uint32_t*)0x40014028U) /**< \brief (TC1) Interrupt Disable Register … macro
44 …#define REG_TC1_IDR0 (0x40084028U) /**< \brief (TC1) Interrupt Disable Register … macro86 …#define REG_TC1_IDR0 (*(__O uint32_t*)0x40084028U) /**< \brief (TC1) Interrupt Disable Register … macro
45 #define REG_TC1_IDR0 (0x40094028U) /**< \brief (TC1) Interrupt Disable Register (channel … macro111 #define REG_TC1_IDR0 (*(WoReg*)0x40094028U) /**< \brief (TC1) Interrupt Disable Register (channel … macro
47 #define REG_TC1_IDR0 (0x40010028) /**< (TC1) Interrupt Disable Register (channel = 0) 0 … macro97 #define REG_TC1_IDR0 (*(__O uint32_t*)0x40010028U) /**< (TC1) Interrupt Disable Registe… macro
47 #define REG_TC1_IDR0 (0x40010028) /**< (TC1) Interrupt Disable Register (channel = 0) 0 … macro98 #define REG_TC1_IDR0 (*(__O uint32_t*)0x40010028U) /**< (TC1) Interrupt Disable Registe… macro
