Searched refs:REG_TC1_EMR2 (Results 1 – 5 of 5) sorted by relevance
73 #define REG_TC1_EMR2 (0x400940B0U) /**< \brief (TC1) Extended Mode Register (channel = 2)… macro139 #define REG_TC1_EMR2 (*(RwReg*)0x400940B0U) /**< \brief (TC1) Extended Mode Register (channel = 2)… macro
75 #define REG_TC1_EMR2 (0x400100B0) /**< (TC1) Extended Mode Register (channel = 0) 2 */ macro125 #define REG_TC1_EMR2 (*(__IO uint32_t*)0x400100B0U) /**< (TC1) Extended Mode Register (c… macro
75 #define REG_TC1_EMR2 (0x400100B0) /**< (TC1) Extended Mode Register (channel = 0) 2 */ macro126 #define REG_TC1_EMR2 (*(__IO uint32_t*)0x400100B0U) /**< (TC1) Extended Mode Register (c… macro
