Searched refs:REG_TC1_CV2 (Results 1 – 8 of 8) sorted by relevance
59 #define REG_TC1_CV2 (0x40014090) /**< \brief (TC1) Counter Value Channel 2 */ macro98 #define REG_TC1_CV2 (*(RoReg *)0x40014090UL) /**< \brief (TC1) Counter Value Channe… macro
60 …#define REG_TC1_CV2 (0x40014090U) /**< \brief (TC1) Counter Value (channel = 2)… macro102 …#define REG_TC1_CV2 (*(__I uint32_t*)0x40014090U) /**< \brief (TC1) Counter Value (channel = 2)… macro
60 …#define REG_TC1_CV2 (0x40084090U) /**< \brief (TC1) Counter Value (channel = 2)… macro102 …#define REG_TC1_CV2 (*(__I uint32_t*)0x40084090U) /**< \brief (TC1) Counter Value (channel = 2)… macro
65 #define REG_TC1_CV2 (0x40094090U) /**< \brief (TC1) Counter Value (channel = 2) */ macro131 #define REG_TC1_CV2 (*(RoReg*)0x40094090U) /**< \brief (TC1) Counter Value (channel = 2) */ macro
67 #define REG_TC1_CV2 (0x40010090) /**< (TC1) Counter Value (channel = 0) 2 */ macro117 #define REG_TC1_CV2 (*(__I uint32_t*)0x40010090U) /**< (TC1) Counter Value (channel = … macro
67 #define REG_TC1_CV2 (0x40010090) /**< (TC1) Counter Value (channel = 0) 2 */ macro118 #define REG_TC1_CV2 (*(__I uint32_t*)0x40010090U) /**< (TC1) Counter Value (channel = … macro
