Searched refs:REG_TC1_CMR2 (Results 1 – 8 of 8) sorted by relevance
57 #define REG_TC1_CMR2 (0x40014084) /**< \brief (TC1) Channel Mode Register Channel 2 */ macro96 #define REG_TC1_CMR2 (*(RwReg *)0x40014084UL) /**< \brief (TC1) Channel Mode Registe… macro
58 …#define REG_TC1_CMR2 (0x40014084U) /**< \brief (TC1) Channel Mode Register (chan… macro100 …#define REG_TC1_CMR2 (*(__IO uint32_t*)0x40014084U) /**< \brief (TC1) Channel Mode Register (chan… macro
58 …#define REG_TC1_CMR2 (0x40084084U) /**< \brief (TC1) Channel Mode Register (chan… macro100 …#define REG_TC1_CMR2 (*(__IO uint32_t*)0x40084084U) /**< \brief (TC1) Channel Mode Register (chan… macro
62 #define REG_TC1_CMR2 (0x40094084U) /**< \brief (TC1) Channel Mode Register (channel = 2) … macro128 #define REG_TC1_CMR2 (*(RwReg*)0x40094084U) /**< \brief (TC1) Channel Mode Register (channel = 2) … macro
64 #define REG_TC1_CMR2 (0x40010084) /**< (TC1) Channel Mode Register (channel = 0) 2 */ macro114 #define REG_TC1_CMR2 (*(__IO uint32_t*)0x40010084U) /**< (TC1) Channel Mode Register (ch… macro
64 #define REG_TC1_CMR2 (0x40010084) /**< (TC1) Channel Mode Register (channel = 0) 2 */ macro115 #define REG_TC1_CMR2 (*(__IO uint32_t*)0x40010084U) /**< (TC1) Channel Mode Register (ch… macro
