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Searched refs:REG_TC1_CCR2 (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4l/instance/
Dtc1.h56 #define REG_TC1_CCR2 (0x40014080) /**< \brief (TC1) Channel Control Register Channel … macro
95 #define REG_TC1_CCR2 (*(WoReg *)0x40014080UL) /**< \brief (TC1) Channel Control Regi… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dtc1.h57 …#define REG_TC1_CCR2 (0x40014080U) /**< \brief (TC1) Channel Control Register (c… macro
99 …#define REG_TC1_CCR2 (*(__O uint32_t*)0x40014080U) /**< \brief (TC1) Channel Control Register (c… macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dtc1.h57 …#define REG_TC1_CCR2 (0x40084080U) /**< \brief (TC1) Channel Control Register (c… macro
99 …#define REG_TC1_CCR2 (*(__O uint32_t*)0x40084080U) /**< \brief (TC1) Channel Control Register (c… macro
/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dtc1.h61 #define REG_TC1_CCR2 (0x40094080U) /**< \brief (TC1) Channel Control Register (channel = … macro
127 #define REG_TC1_CCR2 (*(WoReg*)0x40094080U) /**< \brief (TC1) Channel Control Register (channel = … macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dtc1.h63 #define REG_TC1_CCR2 (0x40010080) /**< (TC1) Channel Control Register (channel = 0) 2 */ macro
113 #define REG_TC1_CCR2 (*(__O uint32_t*)0x40010080U) /**< (TC1) Channel Control Register … macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dtc1.h63 #define REG_TC1_CCR2 (0x40010080) /**< (TC1) Channel Control Register (channel = 0) 2 */ macro
114 #define REG_TC1_CCR2 (*(__O uint32_t*)0x40010080U) /**< (TC1) Channel Control Register … macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dtc1.h63 #define REG_TC1_CCR2 (0x40010080) /**< (TC1) Channel Control Register (channel = 0) 2 */ macro
113 #define REG_TC1_CCR2 (*(__O uint32_t*)0x40010080U) /**< (TC1) Channel Control Register … macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dtc1.h63 #define REG_TC1_CCR2 (0x40010080) /**< (TC1) Channel Control Register (channel = 0) 2 */ macro
113 #define REG_TC1_CCR2 (*(__O uint32_t*)0x40010080U) /**< (TC1) Channel Control Register … macro