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Searched refs:REG_TC1_CCR1 (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4l/instance/
Dtc1.h45 #define REG_TC1_CCR1 (0x40014040) /**< \brief (TC1) Channel Control Register Channel … macro
84 #define REG_TC1_CCR1 (*(WoReg *)0x40014040UL) /**< \brief (TC1) Channel Control Regi… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dtc1.h46 …#define REG_TC1_CCR1 (0x40014040U) /**< \brief (TC1) Channel Control Register (c… macro
88 …#define REG_TC1_CCR1 (*(__O uint32_t*)0x40014040U) /**< \brief (TC1) Channel Control Register (c… macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dtc1.h46 …#define REG_TC1_CCR1 (0x40084040U) /**< \brief (TC1) Channel Control Register (c… macro
88 …#define REG_TC1_CCR1 (*(__O uint32_t*)0x40084040U) /**< \brief (TC1) Channel Control Register (c… macro
/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dtc1.h48 #define REG_TC1_CCR1 (0x40094040U) /**< \brief (TC1) Channel Control Register (channel = … macro
114 #define REG_TC1_CCR1 (*(WoReg*)0x40094040U) /**< \brief (TC1) Channel Control Register (channel = … macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dtc1.h50 #define REG_TC1_CCR1 (0x40010040) /**< (TC1) Channel Control Register (channel = 0) 1 */ macro
100 #define REG_TC1_CCR1 (*(__O uint32_t*)0x40010040U) /**< (TC1) Channel Control Register … macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dtc1.h50 #define REG_TC1_CCR1 (0x40010040) /**< (TC1) Channel Control Register (channel = 0) 1 */ macro
101 #define REG_TC1_CCR1 (*(__O uint32_t*)0x40010040U) /**< (TC1) Channel Control Register … macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dtc1.h50 #define REG_TC1_CCR1 (0x40010040) /**< (TC1) Channel Control Register (channel = 0) 1 */ macro
100 #define REG_TC1_CCR1 (*(__O uint32_t*)0x40010040U) /**< (TC1) Channel Control Register … macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dtc1.h50 #define REG_TC1_CCR1 (0x40010040) /**< (TC1) Channel Control Register (channel = 0) 1 */ macro
100 #define REG_TC1_CCR1 (*(__O uint32_t*)0x40010040U) /**< (TC1) Channel Control Register … macro