Searched refs:REG_TC0_QISR (Results 1 – 7 of 7) sorted by relevance
73 …#define REG_TC0_QISR (0x400100D4U) /**< \brief (TC0) QDEC Interrupt Status Regis… macro115 …#define REG_TC0_QISR (*(__I uint32_t*)0x400100D4U) /**< \brief (TC0) QDEC Interrupt Status Regis… macro
73 …#define REG_TC0_QISR (0x400800D4U) /**< \brief (TC0) QDEC Interrupt Status Regis… macro115 …#define REG_TC0_QISR (*(__I uint32_t*)0x400800D4U) /**< \brief (TC0) QDEC Interrupt Status Regis… macro
79 #define REG_TC0_QISR (0x400900D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ macro145 #define REG_TC0_QISR (*(RoReg*)0x400900D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ macro
81 #define REG_TC0_QISR (0x4000C0D4) /**< (TC0) QDEC Interrupt Status Register */ macro131 #define REG_TC0_QISR (*(__I uint32_t*)0x4000C0D4U) /**< (TC0) QDEC Interrupt Status Reg… macro
81 #define REG_TC0_QISR (0x4000C0D4) /**< (TC0) QDEC Interrupt Status Register */ macro132 #define REG_TC0_QISR (*(__I uint32_t*)0x4000C0D4U) /**< (TC0) QDEC Interrupt Status Reg… macro
