Searched refs:REG_TC0_IMR0 (Results 1 – 8 of 8) sorted by relevance
44 #define REG_TC0_IMR0 (0x4001002C) /**< \brief (TC0) Interrupt Mask Register Channel 0… macro83 #define REG_TC0_IMR0 (*(RoReg *)0x4001002CUL) /**< \brief (TC0) Interrupt Mask Regis… macro
45 …#define REG_TC0_IMR0 (0x4001002CU) /**< \brief (TC0) Interrupt Mask Register (ch… macro87 …#define REG_TC0_IMR0 (*(__I uint32_t*)0x4001002CU) /**< \brief (TC0) Interrupt Mask Register (ch… macro
45 …#define REG_TC0_IMR0 (0x4008002CU) /**< \brief (TC0) Interrupt Mask Register (ch… macro87 …#define REG_TC0_IMR0 (*(__I uint32_t*)0x4008002CU) /**< \brief (TC0) Interrupt Mask Register (ch… macro
46 #define REG_TC0_IMR0 (0x4009002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0… macro112 #define REG_TC0_IMR0 (*(RoReg*)0x4009002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0… macro
48 #define REG_TC0_IMR0 (0x4000C02C) /**< (TC0) Interrupt Mask Register (channel = 0) 0 */ macro98 #define REG_TC0_IMR0 (*(__I uint32_t*)0x4000C02CU) /**< (TC0) Interrupt Mask Register (… macro
48 #define REG_TC0_IMR0 (0x4000C02C) /**< (TC0) Interrupt Mask Register (channel = 0) 0 */ macro99 #define REG_TC0_IMR0 (*(__I uint32_t*)0x4000C02CU) /**< (TC0) Interrupt Mask Register (… macro
