Searched refs:REG_TC0_IER1 (Results 1 – 8 of 8) sorted by relevance
53 #define REG_TC0_IER1 (0x40010064) /**< \brief (TC0) Interrupt Enable Register Channel… macro92 #define REG_TC0_IER1 (*(WoReg *)0x40010064UL) /**< \brief (TC0) Interrupt Enable Reg… macro
54 …#define REG_TC0_IER1 (0x40010064U) /**< \brief (TC0) Interrupt Enable Register (… macro96 …#define REG_TC0_IER1 (*(__O uint32_t*)0x40010064U) /**< \brief (TC0) Interrupt Enable Register (… macro
54 …#define REG_TC0_IER1 (0x40080064U) /**< \brief (TC0) Interrupt Enable Register (… macro96 …#define REG_TC0_IER1 (*(__O uint32_t*)0x40080064U) /**< \brief (TC0) Interrupt Enable Register (… macro
57 #define REG_TC0_IER1 (0x40090064U) /**< \brief (TC0) Interrupt Enable Register (channel =… macro123 #define REG_TC0_IER1 (*(WoReg*)0x40090064U) /**< \brief (TC0) Interrupt Enable Register (channel =… macro
59 #define REG_TC0_IER1 (0x4000C064) /**< (TC0) Interrupt Enable Register (channel = 0) 1 */ macro109 #define REG_TC0_IER1 (*(__O uint32_t*)0x4000C064U) /**< (TC0) Interrupt Enable Register… macro
59 #define REG_TC0_IER1 (0x4000C064) /**< (TC0) Interrupt Enable Register (channel = 0) 1 */ macro110 #define REG_TC0_IER1 (*(__O uint32_t*)0x4000C064U) /**< (TC0) Interrupt Enable Register… macro
