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Searched refs:REG_TC0_IDR1 (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4l/instance/
Dtc0.h54 #define REG_TC0_IDR1 (0x40010068) /**< \brief (TC0) Interrupt Disable Register Channe… macro
93 #define REG_TC0_IDR1 (*(WoReg *)0x40010068UL) /**< \brief (TC0) Interrupt Disable Re… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dtc0.h55 …#define REG_TC0_IDR1 (0x40010068U) /**< \brief (TC0) Interrupt Disable Register … macro
97 …#define REG_TC0_IDR1 (*(__O uint32_t*)0x40010068U) /**< \brief (TC0) Interrupt Disable Register … macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dtc0.h55 …#define REG_TC0_IDR1 (0x40080068U) /**< \brief (TC0) Interrupt Disable Register … macro
97 …#define REG_TC0_IDR1 (*(__O uint32_t*)0x40080068U) /**< \brief (TC0) Interrupt Disable Register … macro
/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dtc0.h58 #define REG_TC0_IDR1 (0x40090068U) /**< \brief (TC0) Interrupt Disable Register (channel … macro
124 #define REG_TC0_IDR1 (*(WoReg*)0x40090068U) /**< \brief (TC0) Interrupt Disable Register (channel … macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dtc0.h60 #define REG_TC0_IDR1 (0x4000C068) /**< (TC0) Interrupt Disable Register (channel = 0) 1 … macro
110 #define REG_TC0_IDR1 (*(__O uint32_t*)0x4000C068U) /**< (TC0) Interrupt Disable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dtc0.h60 #define REG_TC0_IDR1 (0x4000C068) /**< (TC0) Interrupt Disable Register (channel = 0) 1 … macro
111 #define REG_TC0_IDR1 (*(__O uint32_t*)0x4000C068U) /**< (TC0) Interrupt Disable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dtc0.h60 #define REG_TC0_IDR1 (0x4000C068) /**< (TC0) Interrupt Disable Register (channel = 0) 1 … macro
110 #define REG_TC0_IDR1 (*(__O uint32_t*)0x4000C068U) /**< (TC0) Interrupt Disable Registe… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dtc0.h60 #define REG_TC0_IDR1 (0x4000C068) /**< (TC0) Interrupt Disable Register (channel = 0) 1 … macro
110 #define REG_TC0_IDR1 (*(__O uint32_t*)0x4000C068U) /**< (TC0) Interrupt Disable Registe… macro