Searched refs:REG_TC0_IDR1 (Results 1 – 8 of 8) sorted by relevance
54 #define REG_TC0_IDR1 (0x40010068) /**< \brief (TC0) Interrupt Disable Register Channe… macro93 #define REG_TC0_IDR1 (*(WoReg *)0x40010068UL) /**< \brief (TC0) Interrupt Disable Re… macro
55 …#define REG_TC0_IDR1 (0x40010068U) /**< \brief (TC0) Interrupt Disable Register … macro97 …#define REG_TC0_IDR1 (*(__O uint32_t*)0x40010068U) /**< \brief (TC0) Interrupt Disable Register … macro
55 …#define REG_TC0_IDR1 (0x40080068U) /**< \brief (TC0) Interrupt Disable Register … macro97 …#define REG_TC0_IDR1 (*(__O uint32_t*)0x40080068U) /**< \brief (TC0) Interrupt Disable Register … macro
58 #define REG_TC0_IDR1 (0x40090068U) /**< \brief (TC0) Interrupt Disable Register (channel … macro124 #define REG_TC0_IDR1 (*(WoReg*)0x40090068U) /**< \brief (TC0) Interrupt Disable Register (channel … macro
60 #define REG_TC0_IDR1 (0x4000C068) /**< (TC0) Interrupt Disable Register (channel = 0) 1 … macro110 #define REG_TC0_IDR1 (*(__O uint32_t*)0x4000C068U) /**< (TC0) Interrupt Disable Registe… macro
60 #define REG_TC0_IDR1 (0x4000C068) /**< (TC0) Interrupt Disable Register (channel = 0) 1 … macro111 #define REG_TC0_IDR1 (*(__O uint32_t*)0x4000C068U) /**< (TC0) Interrupt Disable Registe… macro