Searched refs:REG_TC0_CV1 (Results 1 – 8 of 8) sorted by relevance
48 #define REG_TC0_CV1 (0x40010050) /**< \brief (TC0) Counter Value Channel 1 */ macro87 #define REG_TC0_CV1 (*(RoReg *)0x40010050UL) /**< \brief (TC0) Counter Value Channe… macro
49 …#define REG_TC0_CV1 (0x40010050U) /**< \brief (TC0) Counter Value (channel = 1)… macro91 …#define REG_TC0_CV1 (*(__I uint32_t*)0x40010050U) /**< \brief (TC0) Counter Value (channel = 1)… macro
49 …#define REG_TC0_CV1 (0x40080050U) /**< \brief (TC0) Counter Value (channel = 1)… macro91 …#define REG_TC0_CV1 (*(__I uint32_t*)0x40080050U) /**< \brief (TC0) Counter Value (channel = 1)… macro
52 #define REG_TC0_CV1 (0x40090050U) /**< \brief (TC0) Counter Value (channel = 1) */ macro118 #define REG_TC0_CV1 (*(RoReg*)0x40090050U) /**< \brief (TC0) Counter Value (channel = 1) */ macro
54 #define REG_TC0_CV1 (0x4000C050) /**< (TC0) Counter Value (channel = 0) 1 */ macro104 #define REG_TC0_CV1 (*(__I uint32_t*)0x4000C050U) /**< (TC0) Counter Value (channel = … macro
54 #define REG_TC0_CV1 (0x4000C050) /**< (TC0) Counter Value (channel = 0) 1 */ macro105 #define REG_TC0_CV1 (*(__I uint32_t*)0x4000C050U) /**< (TC0) Counter Value (channel = … macro
