Searched refs:REG_TC0_CV0 (Results 1 – 8 of 8) sorted by relevance
37 #define REG_TC0_CV0 (0x40010010) /**< \brief (TC0) Counter Value Channel 0 */ macro76 #define REG_TC0_CV0 (*(RoReg *)0x40010010UL) /**< \brief (TC0) Counter Value Channe… macro
38 …#define REG_TC0_CV0 (0x40010010U) /**< \brief (TC0) Counter Value (channel = 0)… macro80 …#define REG_TC0_CV0 (*(__I uint32_t*)0x40010010U) /**< \brief (TC0) Counter Value (channel = 0)… macro
38 …#define REG_TC0_CV0 (0x40080010U) /**< \brief (TC0) Counter Value (channel = 0)… macro80 …#define REG_TC0_CV0 (*(__I uint32_t*)0x40080010U) /**< \brief (TC0) Counter Value (channel = 0)… macro
39 #define REG_TC0_CV0 (0x40090010U) /**< \brief (TC0) Counter Value (channel = 0) */ macro105 #define REG_TC0_CV0 (*(RoReg*)0x40090010U) /**< \brief (TC0) Counter Value (channel = 0) */ macro
41 #define REG_TC0_CV0 (0x4000C010) /**< (TC0) Counter Value (channel = 0) 0 */ macro91 #define REG_TC0_CV0 (*(__I uint32_t*)0x4000C010U) /**< (TC0) Counter Value (channel = … macro
41 #define REG_TC0_CV0 (0x4000C010) /**< (TC0) Counter Value (channel = 0) 0 */ macro92 #define REG_TC0_CV0 (*(__I uint32_t*)0x4000C010U) /**< (TC0) Counter Value (channel = … macro
