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Searched refs:REG_RAMECC_INTENSET (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dramecc.h36 #define REG_RAMECC_INTENSET (0x41020001) /**< \brief (RAMECC) Interrupt Enable Set */ macro
43 #define REG_RAMECC_INTENSET (*(RwReg8 *)0x41020001UL) /**< \brief (RAMECC) Interrupt Enable … macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dramecc.h36 #define REG_RAMECC_INTENSET (0x41020001) /**< \brief (RAMECC) Interrupt Enable Set */ macro
43 #define REG_RAMECC_INTENSET (*(RwReg8 *)0x41020001UL) /**< \brief (RAMECC) Interrupt Enable … macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dramecc.h36 #define REG_RAMECC_INTENSET (0x41020001) /**< \brief (RAMECC) Interrupt Enable Set */ macro
43 #define REG_RAMECC_INTENSET (*(RwReg8 *)0x41020001UL) /**< \brief (RAMECC) Interrupt Enable … macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dramecc.h36 #define REG_RAMECC_INTENSET (0x41020001) /**< \brief (RAMECC) Interrupt Enable Set */ macro
43 #define REG_RAMECC_INTENSET (*(RwReg8 *)0x41020001UL) /**< \brief (RAMECC) Interrupt Enable … macro