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Searched refs:REG_QSPI_IER (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/same70/instance/
Dqspi.h42 #define REG_QSPI_IER (0x4007C014) /**< (QSPI) Interrupt Enable Register */ macro
61 #define REG_QSPI_IER (*(__O uint32_t*)0x4007C014U) /**< (QSPI) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dqspi.h42 #define REG_QSPI_IER (0x4007C014) /**< (QSPI) Interrupt Enable Register */ macro
62 #define REG_QSPI_IER (*(__O uint32_t*)0x4007C014U) /**< (QSPI) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dqspi.h42 #define REG_QSPI_IER (0x4007C014) /**< (QSPI) Interrupt Enable Register */ macro
61 #define REG_QSPI_IER (*(__O uint32_t*)0x4007C014U) /**< (QSPI) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dqspi.h42 #define REG_QSPI_IER (0x4007C014) /**< (QSPI) Interrupt Enable Register */ macro
61 #define REG_QSPI_IER (*(__O uint32_t*)0x4007C014U) /**< (QSPI) Interrupt Enable Registe… macro