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Searched refs:REG_QSPI_CR (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/same70/instance/
Dqspi.h37 #define REG_QSPI_CR (0x4007C000) /**< (QSPI) Control Register */ macro
56 #define REG_QSPI_CR (*(__O uint32_t*)0x4007C000U) /**< (QSPI) Control Register */ macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dqspi.h37 #define REG_QSPI_CR (0x4007C000) /**< (QSPI) Control Register */ macro
57 #define REG_QSPI_CR (*(__O uint32_t*)0x4007C000U) /**< (QSPI) Control Register */ macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dqspi.h37 #define REG_QSPI_CR (0x4007C000) /**< (QSPI) Control Register */ macro
56 #define REG_QSPI_CR (*(__O uint32_t*)0x4007C000U) /**< (QSPI) Control Register */ macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dqspi.h37 #define REG_QSPI_CR (0x4007C000) /**< (QSPI) Control Register */ macro
56 #define REG_QSPI_CR (*(__O uint32_t*)0x4007C000U) /**< (QSPI) Control Register */ macro