Searched refs:REG_PWM1_CPRDUPD3 (Results 1 – 4 of 4) sorted by relevance
97 #define REG_PWM1_CPRDUPD3 (0x4005C270) /**< (PWM1) PWM Channel Period Update Register (ch_num… macro210 #define REG_PWM1_CPRDUPD3 (*(__O uint32_t*)0x4005C270U) /**< (PWM1) PWM Channel Period Updat… macro
97 #define REG_PWM1_CPRDUPD3 (0x4005C270) /**< (PWM1) PWM Channel Period Update Register 3 */ macro209 #define REG_PWM1_CPRDUPD3 (*(__O uint32_t*)0x4005C270U) /**< (PWM1) PWM Channel Period Updat… macro
97 #define REG_PWM1_CPRDUPD3 (0x4005C270) /**< (PWM1) PWM Channel Period Update Register (ch_num… macro209 #define REG_PWM1_CPRDUPD3 (*(__O uint32_t*)0x4005C270U) /**< (PWM1) PWM Channel Period Updat… macro
