Searched refs:REG_PWM1_CPRDUPD0 (Results 1 – 4 of 4) sorted by relevance
73 #define REG_PWM1_CPRDUPD0 (0x4005C210) /**< (PWM1) PWM Channel Period Update Register (ch_num… macro186 #define REG_PWM1_CPRDUPD0 (*(__O uint32_t*)0x4005C210U) /**< (PWM1) PWM Channel Period Updat… macro
73 #define REG_PWM1_CPRDUPD0 (0x4005C210) /**< (PWM1) PWM Channel Period Update Register 0 */ macro185 #define REG_PWM1_CPRDUPD0 (*(__O uint32_t*)0x4005C210U) /**< (PWM1) PWM Channel Period Updat… macro
73 #define REG_PWM1_CPRDUPD0 (0x4005C210) /**< (PWM1) PWM Channel Period Update Register (ch_num… macro185 #define REG_PWM1_CPRDUPD0 (*(__O uint32_t*)0x4005C210U) /**< (PWM1) PWM Channel Period Updat… macro
