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Searched refs:REG_PWM1_CMR2 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpwm1.h85 #define REG_PWM1_CMR2 (0x4005C240) /**< (PWM1) PWM Channel Mode Register (ch_num = 0) 2 */ macro
198 #define REG_PWM1_CMR2 (*(__IO uint32_t*)0x4005C240U) /**< (PWM1) PWM Channel Mode Registe… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpwm1.h85 #define REG_PWM1_CMR2 (0x4005C240) /**< (PWM1) PWM Channel Mode Register 2 */ macro
197 #define REG_PWM1_CMR2 (*(__IO uint32_t*)0x4005C240U) /**< (PWM1) PWM Channel Mode Registe… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpwm1.h85 #define REG_PWM1_CMR2 (0x4005C240) /**< (PWM1) PWM Channel Mode Register 2 */ macro
197 #define REG_PWM1_CMR2 (*(__IO uint32_t*)0x4005C240U) /**< (PWM1) PWM Channel Mode Registe… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpwm1.h85 #define REG_PWM1_CMR2 (0x4005C240) /**< (PWM1) PWM Channel Mode Register (ch_num = 0) 2 */ macro
197 #define REG_PWM1_CMR2 (*(__IO uint32_t*)0x4005C240U) /**< (PWM1) PWM Channel Mode Registe… macro