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Searched refs:REG_PMC_PCER1 (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dpmc.h56 #define REG_PMC_PCER1 (0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Register 1 … macro
82 #define REG_PMC_PCER1 (*(WoReg*)0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Register 1 … macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dpmc.h57 …#define REG_PMC_PCER1 (0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
84 …#define REG_PMC_PCER1 (*(__O uint32_t*)0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dpmc.h57 …#define REG_PMC_PCER1 (0x400E0700U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
84 …#define REG_PMC_PCER1 (*(__O uint32_t*)0x400E0700U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpmc.h68 #define REG_PMC_PCER1 (0x400E0700) /**< (PMC) Peripheral Clock Enable Register 1 */ macro
119 #define REG_PMC_PCER1 (*(__O uint32_t*)0x400E0700U) /**< (PMC) Peripheral Clock Enable R… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpmc.h67 #define REG_PMC_PCER1 (0x400E0700) /**< (PMC) Peripheral Clock Enable Register 1 */ macro
115 #define REG_PMC_PCER1 (*(__O uint32_t*)0x400E0700U) /**< (PMC) Peripheral Clock Enable R… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpmc.h67 #define REG_PMC_PCER1 (0x400E0700) /**< (PMC) Peripheral Clock Enable Register 1 */ macro
115 #define REG_PMC_PCER1 (*(__O uint32_t*)0x400E0700U) /**< (PMC) Peripheral Clock Enable R… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpmc.h67 #define REG_PMC_PCER1 (0x400E0700) /**< (PMC) Peripheral Clock Enable Register 1 */ macro
115 #define REG_PMC_PCER1 (*(__O uint32_t*)0x400E0700U) /**< (PMC) Peripheral Clock Enable R… macro