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Searched refs:REG_PMC_PCER0 (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dpmc.h38 #define REG_PMC_PCER0 (0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register 0 … macro
64 #define REG_PMC_PCER0 (*(WoReg*)0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register 0 … macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dpmc.h38 …#define REG_PMC_PCER0 (0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
65 …#define REG_PMC_PCER0 (*(__O uint32_t*)0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dpmc.h38 …#define REG_PMC_PCER0 (0x400E0610U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
65 …#define REG_PMC_PCER0 (*(__O uint32_t*)0x400E0610U) /**< \brief (PMC) Peripheral Clock Enable Re… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpmc.h40 #define REG_PMC_PCER0 (0x400E0610) /**< (PMC) Peripheral Clock Enable Register 0 */ macro
91 #define REG_PMC_PCER0 (*(__O uint32_t*)0x400E0610U) /**< (PMC) Peripheral Clock Enable R… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpmc.h40 #define REG_PMC_PCER0 (0x400E0610) /**< (PMC) Peripheral Clock Enable Register 0 */ macro
88 #define REG_PMC_PCER0 (*(__O uint32_t*)0x400E0610U) /**< (PMC) Peripheral Clock Enable R… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpmc.h40 #define REG_PMC_PCER0 (0x400E0610) /**< (PMC) Peripheral Clock Enable Register 0 */ macro
88 #define REG_PMC_PCER0 (*(__O uint32_t*)0x400E0610U) /**< (PMC) Peripheral Clock Enable R… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpmc.h40 #define REG_PMC_PCER0 (0x400E0610) /**< (PMC) Peripheral Clock Enable Register 0 */ macro
88 #define REG_PMC_PCER0 (*(__O uint32_t*)0x400E0610U) /**< (PMC) Peripheral Clock Enable R… macro