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Searched refs:REG_PIOE_IFER (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dpioe.h41 #define REG_PIOE_IFER (0x400E1620U) /**< \brief (PIOE) Glitch Input Filter Enable Reg… macro
96 #define REG_PIOE_IFER (*(WoReg*)0x400E1620U) /**< \brief (PIOE) Glitch Input Filter Enable Reg… macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dpioe.h41 …#define REG_PIOE_IFER (0x400E1620U) /**< \brief (PIOE) Glitch Input Filter Enab… macro
85 …#define REG_PIOE_IFER (*(__O uint32_t*)0x400E1620U) /**< \brief (PIOE) Glitch Input Filter Enab… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dpioe.h43 #define REG_PIOE_IFER (0x400E1620) /**< (PIOE) Glitch Input Filter Enable Register */ macro
102 #define REG_PIOE_IFER (*(__O uint32_t*)0x400E1620U) /**< (PIOE) Glitch Input Filter Enab… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dpioe.h43 #define REG_PIOE_IFER (0x400E1620) /**< (PIOE) Glitch Input Filter Enable Register */ macro
102 #define REG_PIOE_IFER (*(__O uint32_t*)0x400E1620U) /**< (PIOE) Glitch Input Filter Enab… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dpioe.h43 #define REG_PIOE_IFER (0x400E1620) /**< (PIOE) Glitch Input Filter Enable Register */ macro
102 #define REG_PIOE_IFER (*(__O uint32_t*)0x400E1620U) /**< (PIOE) Glitch Input Filter Enab… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dpioe.h43 #define REG_PIOE_IFER (0x400E1620) /**< (PIOE) Glitch Input Filter Enable Register */ macro
103 #define REG_PIOE_IFER (*(__O uint32_t*)0x400E1620U) /**< (PIOE) Glitch Input Filter Enab… macro